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STM32F479AI 数据表(PDF) 164 Page - STMicroelectronics |
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STM32F479AI 数据表(HTML) 164 Page - STMicroelectronics |
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164 / 217 page  Electrical characteristics STM32F479xx 164/217 DocID028010 Rev 3 Figure 58. 12-bit buffered/non-buffered DAC 1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the DAC_CR register. 5.3.29 FMC characteristics Unless otherwise specified, the parameters given in Tables 88 through 101 for the FMC interface are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage conditions summarized in Table 17, with the following configuration: • Output speed is set to OSPEEDRy[1:0] = 11 • Measurement points are done at CMOS levels: 0.5 VDD Refer to Section 5.3.20 for more details on the input/output characteristics. Asynchronous waveforms and timings Figures 59 through 62 represent asynchronous waveforms, and Tables 88 through 95 provide the corresponding timings. The results shown in these tables are obtained with the following FMC configuration: • AddressSetupTime = 0x1 • AddressHoldTime = 0x1 • DataSetupTime = 0x1 (except for asynchronous NWAIT mode , DataSetupTime = 0x5) • BusTurnAroundDuration = 0x0 • Capacitive load CL = 30 pF |
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