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STM32F479AI 数据表(PDF) 185 Page - STMicroelectronics

部件名 STM32F479AI
功能描述  ARMCortex-M4 32b MCUFPU, 225DMIPS, up to 2MB Flash/3844KB RAM, USB OTG HS/FS, Ethernet, FMC, dual Quad-SPI, Crypto, Graphical accelerator, Camera IF, LCD-TFT & MIPI DSI
PDF  217 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STM32F479AI 数据表(HTML) 185 Page - STMicroelectronics

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STM32F479xx
Electrical characteristics
190
Figure 74. Quad-SPI DDR timing diagram
5.3.31
Camera interface (DCMI) timing specifications
Unless otherwise specified, the parameters given in Table 108 for DCMI are derived
from tests performed under the ambient temperature, fHCLK frequency and VDD supply
voltage summarized in Table 17, with the following configuration:
•
DCMI_PIXCLK polarity: falling
•
DCMI_VSYNC and DCMI_HSYNC polarity: high
•
Data formats: 14 bits
•
Capacitive load C = 30 pF
•
Measurement points are done at CMOS levels: 0.5 VDD
Table 107. Quad-SPI characteristics in DDR mode(1)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
Fck
1/t(CK)
Quad-SPI clock frequency
2.7 V ≤ VDD ≤ 3.6 V,
CL = 20 pF
--
80
MHz
1.71 V ≤ VDD ≤ 3.6 V,
CL = 15 pF
--
70
tw(CKH)
Quad-SPI clock high time
‐
t(CK)/2-1
-
t(CK)/2
ns
tw(CKL)
Quad-SPI clock low time
-
t(CK)/2
-
t(CK)/2+1
tsr(IN)
tsf(IN)
Data input set-up time
2.7 V ≤ VDD ≤ 3.6 V
2
-
-
1.71 V ≤ VDD ≤ 3.6 V
0.5
-
-
thr(IN)
thf(IN)
Data input hold time
2.7 V ≤ VDD ≤ 3.6 V
3
-
-
1.71 V ≤ VDD ≤ 3.6 V
4.5
-
-
tvr(OUT)
tvf(OUT)
Data output valid time
DHHC=0
-
8
10.5
DHHC=1
Pres=1,2…
-Thclk/2+2 Thclk/2+2.5
th(OUT)
tf(OUT)
Data output hold time
DHHC=0
7
-
-
DHHC=1
Pres=1,2…
Thclk/2+0.5
-
-
1. Guaranteed based on test during characterization.



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