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STSPIN240 数据表(PDF) 10 Page - STMicroelectronics |
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STSPIN240 数据表(HTML) 10 Page - STMicroelectronics |
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10 / 26 page ![]() Pin description STSPIN240 10/26 DocID029313 Rev 3 4 Pin description Figure 2. Pin connection (top view) 1. The exposed pad must be connected to ground. Table 6. Pin description No. Name Type Function 1 PHA Logic input Phase input for bridge A 2 PWMA Logic input PWM input for bridge A 3 OUTA1 Power output Power bridge output side A1 4 SENSEA Power output Sense output of the bridge A 5 OUTA2 Power output Power bridge output side A2 6 VS Supply Device supply voltage 7, EPAD GND Ground Device ground 8 OUTB2 Power output Power bridge output side B2 9 SENSEB Power output Sense output of the bridge B 10 OUTB1 Power output Power bridge output side B1 11 REF Analog input Reference voltage for the current limiter circuitry 12 TOFF Analog input Internal oscillator frequency adjustment 13 EN\FAULT Logic input\ open drain output Logic input 5 V compliant with open drain output. This is the power stage enable (when low, the power stage is turned off) and is forced low through the integrated open drain MOSFET when a failure occurs. 1 2 3 4 PHA PWMA OUTA1 SENSEA 12 11 10 9 TOFF REF OUTB1 SENSEB 56 8 7 OUTA2 VS OUTB2 GND 16 EPAD 15 13 14 PWMB PHB EN\FAULT STBY\ RESET |
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