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VIPER011LSTR 数据表(PDF) 19 Page - STMicroelectronics |
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VIPER011LSTR 数据表(HTML) 19 Page - STMicroelectronics |
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19 / 36 page ![]() VIPer01 General description DocID028751 Rev 1 19/36 4.5 Soft-start The internal soft-start function of the device progressively increases the cycle-by-cycle current limitation set point from zero up to IDLIM in 8 steps. The soft-start time, tSS, is internally set at 8 ms. This function is activated at any attempt of converter startup and at any restart after a fault event. The feature protects the system at the startup when the output load occurs like a short-circuit and the converter works at its maximum drain current limitation. Figure 27: Soft startup 4.6 Oscillator The IC embeds a fixed frequency oscillator with jittering feature. The switching frequency is modulated by approximately ± 7% kHz FOSC at 260 Hz rate. The purpose of the jittering is to get a spread-spectrum action that distributes the energy of each harmonic of the switching frequency over a number of frequency bands, having the same energy on the whole but smaller amplitudes. This helps to reduce the conducted emissions, especially when measured with the average detection method or, which is the same, to pass the EMI tests with an input filter of smaller size than that needed in absence of jittering feature. Three options with different switching frequencies, FOSC, are available: 30 (X type), 60 (L type) and 120 kHz (H type). 4.7 Pulse-skipping The IC embeds a pulse-skip circuit that operates in the following ways: each time the DRAIN peak current exceeds IDLIM level within tON_MIN, the switching cycle is skipped. The cycles can be skipped until the minimum switching frequency is reached, FOSC_MIN (15 kHz). each time the DRAIN peak current does not exceed IDLIM within tON_MIN, a switching cycle is restored. The cycles can be restored until the nominal switching frequency is reached, FOSC (30 or 60 or 120 kHz). |
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