 2016 Microchip Technology Inc.

DS20005595A-page 9

AT9919

3.11

PCB Layout Guidelines

Careful PCB layout is critical to achieving low switching

losses and stable operation. Use a multilayer board

whenever possible for better noise immunity. Minimize

ground noise by connecting high-current ground

returns, the input bypass capacitor ground lead and the

output filter ground lead to a single point (star ground

configuration). The fast di/dt loop is composed of the

MOSFET. To minimize noise interaction, this loop area

immunity,

a

Kelvin

connection

is

strongly

exposed tab of the IC to a large area ground plane for

improved power dissipation.