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USB5532B 数据表(PDF) 49 Page - Microchip Technology |
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USB5532B 数据表(HTML) 49 Page - Microchip Technology |
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49 / 68 page ![]() USB5532B DS00001679C-page 49 2012 - 2015 Microchip Technology Inc. 5.6.29 USB UPSTREAM VARISENSE REGISTER 5.6.30 USB3 UPSTREAM LINK STATE REGISTER 5.6.31 USB PORT 1 BOOST REGISTER TABLE 5-46: USB UPSTREAM VARISENSE REGISTER PHY_UP_SENSE (0X60CC) USB Upstream Varisense Register Bit Name R/W Description 7:3 Reserved R Reserved 2:0 HS_SQ_TUNE[2:0] R/W Squelch Tune 3’b000: Nominal 100mV Trip Point 3’b001: Decrease by 12.5mV 3’b010: Decrease by 25mV 3’b011: Decrease by 37.5mV 3’b100: Decrease by 50mV 3’b101: Decrease by 62.5mV 3’b110: Increase by 25mV 3’b111: Increase by 12.5mV TABLE 5-47: USB3 UPSTREAM LINK STATE REGISTER SS_UP_STATE (0X61C0) USB3 Upstream Link State Bit Name R/W Description 7:4 LINK_STATE R Refer to Table 5-54, "USB 3.0 Link States" for more details. 3 Reserved R Reserved 2:0 LINK_SUB_STATE R Refer to Table 5-54, "USB 3.0 Link States" for more details. TABLE 5-48: USB PORT 1 BOOST REGISTER HS_P1_BOOST (0X64CA) USB Port 1 Boost Register Bit Name R/W Description 7:3 Reserved R/W Reserved 2:0 HS_BOOST R/W HS Output Current. 3’b000: Nominal 3’b001: Decrease by 5% 3’b010: Increase by 10% 3’b011: Increase by 5% 3’b100: Increase by 20% 3’b101: Increase by 15% 3’b110: Increase by 30% 3’b111: Increase by 25% |
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