USB2512B datasheet(32/57 Pages) MICROCHIP

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USB251xB/xBi

DS00001692C-page 32

 2010 - 2015 Microchip Technology Inc.

5.1.32

5.2

I2C EEPROM

The hub can be configured via a 2-wire (I2C) EEPROM (256x8). See Table 5-1 for details on enabling the I2C EEPROM

interface. The I2C EEPROM interface implements a subset of the I2C Master Specification (refer to the Philips Semi-

conductor Standard I2C-Bus Specification I2C protocol for details). The hub’s interface is designed to attach to a single

dedicated I2C EEPROM which conforms to the Standard-mode I2C specification (100 kbit/s transfer rate and 7-bit

addressing) for protocol and electrical compatibility. The I2C EEPROM shares the same pins as the SMBus interface,

therefore the SMBus interface is not available when the I2C EEPROM interface has been enabled (and vice versa).

The hub acts as the master and generates the serial clock SCL, controls the bus access (determines which device acts

as the transmitter and which device acts as the receiver), and generates the START and STOP conditions. The hub will

read the external EEPROM for configuration data and then attach to the upstream USB host.

The hub does not have the capacity to write to the external EEPROM. The hub only has the capability to read from an

external EEPROM. The external EEPROM will be read (even if it is blank), and the hub will be configured with the values

that are read. Any values read for unsupported registers will not be retained (i.e., they will remain as the default values).

Reserved registers should be set to 0 unless otherwise specified. EEPROM reset values are 0x00. Contents read from

unavailable registers should be ignored.

5.2.1

I2C SLAVE ADDRESS

The 7-bit slave address is 1010000b.

5.2.2

PROTOCOL IMPLEMENTATION

The hub will only access an EEPROM using the sequential read protocol as outlined in Chapter 8 of MicroChip

24AA02/24LC02B

[4].

5.2.3

PULL-UP RESISTOR

The circuit board designer is required to place external pull-up resistors (10 k

 recommended) on the SDA/SMBDATA

and SCL/SMBCLK/CFG_SEL[0] lines (per SMBus 1.0 Specification [3], and EEPROM manufacturer guidelines) to

VDD33 in order to assure proper operation.

Bit Number

Bit Name

Description

7:3

rsvd

INTF_PW_DN

SMBus Interface Power Down:

: interface is active

: interface power down after ACK has completed

RESET

Reset the SMBus interface and internal memory back to RESET_N assertion

default settings.

: normal run/idle state

: force a reset of registers to their default state

USB_ATTACH

USB Attach (and write protect)

: SMBus slave interface is active

: the hub will signal a USB attach event to an upstream device, and the

internal memory (address range 0x00-0xFE) is write-protected to prevent

unintentional data corruption.

Note:

If no external EEPROM is present, the hub will write 0 to all configuration registers.

Note:

10-bit addressing is not supported.

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