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LM3488MM 数据表(PDF) 19 Page - National Semiconductor (TI) |
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LM3488MM 数据表(HTML) 19 Page - National Semiconductor (TI) |
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19 / 24 page ![]() Typical Applications (Continued) where D MAX is the maximum duty cycle. The turn-on and turn-off transitions of a MOSFET require times of tens of nano-seconds. C RSS and Qg are needed to estimate the large instantaneous power loss that occurs during these transitions. The amount of gate current required to turn the MOSFET on can be calculated using the formula: I G =Qg.FS The required gate drive power to turn the MOSFET on is equal to the switching frequency times the energy required to deliver the charge to bring the gate charge voltage to V DR (see electrical characteristics and typical performance char- acteristics for the drive voltage specification). P Drive =FS.Qg.VDR INPUT CAPACITOR SELECTION Due to the presence of an inductor at the input of a boost converter, the input current waveform is continuous and triangular, as shown in Figure 11. The inductor ensures that the input capacitor sees fairly low ripple currents. However, as the input capacitor gets smaller, the input ripple goes up. The rms current in the input capacitor is given by: The input capacitor should be capable of handling the rms current. Although the input capacitor is not as critical in a boost application, low values can cause impedance interac- tions. Therefore a good quality capacitor should be chosen in the range of 100µF to 200µF. If a value lower than 100µF is used, then problems with impedance interactions or switching noise can affect the LM3478. To improve perfor- mance, especially with V IN below 8 volts, it is recommended to use a 20 Ω resistor at the input to provide a RC filter. The resistor is placed in series with the V IN pin with only a bypass capacitor attached to the V IN pin directly (see Figure 13). A 0.1µF or 1µF ceramic capacitor is necessary in this configu- ration. The bulk input capacitor and inductor will connect on the other side of the resistor with the input power supply. OUTPUT CAPACITOR SELECTION The output capacitor in a boost converter provides all the output current when the inductor is charging. As a result it sees very large ripple currents. The output capacitor should be capable of handling the maximum rms current. The rms current in the output capacitor is: Where and D, the duty cycle is equal to (V OUT −VIN)/VOUT. The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL at the output for high efficiency and low ripple voltage. Surface Mount tantalums, surface mount polymer electrolytic and polymer tantalum, Sanyo- OSCON, or multi-layer ceramic capacitors are recommended at the output. Designing SEPIC Using LM3488 Since the LM3488 controls a low-side N-Channel MOSFET, it can also be used in SEPIC (Single Ended Primary Induc- tance Converter) applications. An example of SEPIC using LM3488 is shown in Figure 14. As shown in Figure 14, the output voltage can be higher or lower than the input voltage. The SEPIC uses two inductors to step-up or step-down the input voltage. The inductors L1 and L2 can be two discrete inductors or two windings of a coupled transformer since equal voltages are applied across the inductor throughout the switching cycle. Using two discrete inductors allows use of catalog magnetics, as opposed to a custom transformer. The input ripple can be reduced along with size by using the coupled windings of transformer for L1 and L2. Due to the presence of the inductor L1 at the input, the SEPIC inherits all the benefits of a boost converter. One main advantage of SEPIC over boost converter is the inher- ent input to output isolation. The capacitor CS isolates the input from the output and provides protection against shorted or malfunctioning load. Hence, the A SEPIC is useful for replacing boost circuits when true shutdown is required. This means that the output voltage falls to 0V when the switch is turned off. In a boost converter, the output can only fall to the input voltage minus a diode drop. 10138893 FIGURE 13. Reducing IC Input Noise www.national.com 19 |
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