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LAN89730 数据表(PDF) 65 Page - Microchip Technology |
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LAN89730 数据表(HTML) 65 Page - Microchip Technology |
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65 / 218 page ![]() 2013-2015 Microchip Technology Inc. DS60001348A-page 65 LAN89730 4.5.4.3 Hash Perfect Filtering In hash Perfect Filtering, if the received frame is a physical address, the device’s Packet Filter Block perfect filters the incoming frame’s destination field with the value programmed into the MAC Address High register and the MAC Address Low register. If the incoming frame is a multicast frame, however, the device’s packet filter function performs an imper- fect address filtering against the hash table. The imperfect filtering against the hash table is the same imperfect filtering process described in Section 4.5.4.2, "Hash Only Filtering Mode". 4.5.4.4 Inverse Filtering In Inverse Filtering, the Packet Filter Block accepts incoming frames with a destination address not matching the perfect address (i.e., the value programmed into the MAC Address High register and the MAC Address Low register in the CRC block) and rejects frames with destination addresses matching the perfect address. For all filtering modes, when MCPAS is set, all multicast frames are accepted. When the PRMS bit is set, all frames are accepted regardless of their destination address. This includes all broadcast frames as well. 4.5.5 WAKEUP FRAME DETECTION Setting the Wakeup Frame Enable (WUEN) bit in the Wakeup Control and Status Register (WUCSR), places the MAC in the Wakeup Frame Detection mode. In this mode, normal data reception is disabled, and detection logic within the MAC examines receive data for the pre-programmed Wakeup Frame patterns. When a wakeup pattern is received, the Remote Wakeup Frame Received (WUFR) bit in the WUCSR is set, the device places itself in a fully operational state, and remote wakeup is issued. The host will then resume the device and read the WUSCR register to determine the condition that caused the remote wakeup. Upon determining that the WUFR bit is set, the host will know a Wakeup Frame detection event was the cause. The host will then clear the WUFR bit, and clear the WUEN bit to resume normal receive operation. Refer to Section 6.4.12, "Wakeup Control and Status Register (WUCSR)" for additional information on this register. Before putting the MAC into the Wakeup Frame detection state, the host must provide the detection logic with a list of sample frames and their corresponding byte masks. This information is written into the Wakeup Frame Filter register (WUFF). Refer to Section 6.4.11, "Wakeup Frame Filter (WUFF)" for additional information on this register. Table 4-46 indicates the number of Wakeup Frame Filters contained in the WUFF.The number of writes/reads required to program the WUFF or read its contents, respectively, is also indicated. The programmable filters support many different receive packet patterns. If remote wakeup mode is enabled, the remote wakeup function receives all frames addressed to the MAC. It then checks each frame against the enabled filter and recognizes the frame as a remote Wakeup Frame if it passes the WUFF’s address filtering and CRC value match. In order to determine which bytes of the frames should be checked by the CRC module, the MAC uses a programmable byte mask and a programmable pattern offset for each of the supported filters. The pattern’s offset defines the location of the first byte that should be checked in the frame. The byte mask is a 128- bit field that specifies whether or not each of the 128 contiguous bytes within the frame, beginning in the pattern offset, should be checked. If bit j in the byte mask is set, the detection logic checks byte offset +j in the frame. In order to load the Wakeup Frame Filter register, the host LAN driver software must perform the number of writes indi- cated in Table 4-46 to the device’s Wakeup Frame Filter register (WUFF). The contents of the Wakeup Frame Filter reg- ister may be obtained by reading it. The number of reads required to extract the entire contents of the device’s WUFF is also indicated in Table 4-46. Table 4-47 shows the Wakeup Frame Filter register’s structure. TABLE 4-46: WAKEUP FRAME FILTER CAPACITY Number of Filters Number of Writes/Reads 840 |
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