Corporation

SIGNAL PROCESSING EXCELLENCE

185

Binary Input

Analog Output

111…111

-V

N

)

100…001

-V

100…000

-V

)

011…111

-V

000…001

-V

-N

)

000…000

0

Table 1. Unipolar Transfer Function

Individual latch controls are provided for the

high and low bytes which may be tied together

for a single 16-bit word update. The data is

latched with the strobe at logic 0. The latches are

level–triggered and can be made transparent by

tying them to logic 1. However, use of the

latches is recommended in most applications as

they significantly reduce data bit skew, which

affects the glitch performance.

Layout, Grounding and Guarding

16-bit system performance can be maintained

with suitable attention paid to the layout, ground-

ing and guarding techniques employed. All

grounds should be of as low resistance as pos-

sible. Analog and digital grounds should be

individually star-pointed and tied together as

close as possible to the SP9316. Good layout

techniques dictate that the high–speed digital

inputs should be kept separate from low–level

analog outputs. The DAC output and op amp

input are high impedance and so are sensitive to

interference from the digital input lines. Careful

pinout design of the SP9316 has reduced this

problem to a minimum, but guarding of these

points should be considered. Figures 3 and 4

detail the low impedance guard track layout.

Amplifier Selection

The SP9316 allows the designer to obtain the

optimum performance for each application. Se-

lection of the correct operational amplifier, and

the layout of the associated components are

critical to the success of the design. To obtain

the optimum linearity performance, the amplifi-

ers must have an open loop gain in excess of

100,000 or 100dB. Care should be taken to

ensure that the summing junction is as close to

analog ground as possible. Most applications

demand that the input offset be kept below

100

µV. To maintain accuracy over temperature,

the amplifiers should have low bias currents and

offset voltage temperature coefficients.

In bipolar applications, attention must be paid to

the choice of resistors R and 2R (see figure 2).

As the analog voltage output increases from

zero to full-scale, the power dissipated by the

feedback resistor increases and the resistor heats

up. This causes a small change in the resistance

value which could lead to an alteration to the

transfer function, which may be seen as integral

linearity errors. The internal resistor network

has been designed using ultra-stable thin-film

nichrome. It is important that the temperature

coefficient of the external resistors match those

in the DAC as closely as possible. Resistors

with a temperature coefficient of 10ppm/

°C or

better should be used.

LONG TERM DRIFT

When measuring the stability of the SP9316,

great care should be taken to ensure that the drift

of the measurement instruments can be sepa-

Figure 2. Bipolar Operation

BIT 1 (MSB)

MSB LATCH

LSB LATCH

_

+

SP9316

400Ω

DIGITAL

INPUT

+15V

All "ones":

0.01µF

1µF

+

17

18

13

14

16

15

BIT 16 (LSB)

GND

NOTE:

_

+

R

R for ±5V FS output

2R for ±10V FS output

2R

Offset Binary Input

Analog Output

111…111

-V

-(N-1)

)

100…001

-V

-(N-1)

)

100…000

0

011…111

V

-(N-1)

)

000…001

V

-(N-1)

)

000…000

V

REF

Table 2. Bipolar Transfer Function