UC2000D

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

4 of 5

www.unisonic.com.tw

QW-R129-019 .a



OPERATION DESCRIPTION

The UTC UC2000D is a cost effective PWM power switch optimized for off-line non-isolated buck applications

including electrical appliance and linear regulator replacement. It operates in current mode and regulates output

voltage with dedicated features. High integration can afford low cost and component count solution.

Startup Current And Start up Control

threshold and starts up quickly. A large value startup resistor can therefore be used to minimize the power loss in

application.

Operating Current

The Operating current of UTC UC2000D is as low as 3mA. Good efficiency is achieved with the low operating

current together with ‘Muti-mode’ control features.

Oscillator Operation

components are required for PCB design simplification.

At light load or zero load condition, most of the power dissipation in a switching mode power supply is from

switching loss on the MOSFET. The magnitude of power loss is in proportion to the switching frequency. Lower

switching frequency leads to the reduction on the power loss and thus conserves the energy. The switching

frequency is internally adjusted at light load or no load condition. The switch frequency reduces at light/no load

condition to improve the conversion efficiency.

Frequency Shuffling For EMI Improvement

The frequency shuffling (switching frequency modulation) is implemented in UTC UC2000D. The oscillation

frequency is modulated so that the tone energy is spread out. The spread spectrum minimizes the conduction band

EMI and therefore eases the system design.

Built-in Error Amplifier

In UTC UC2000D, on-chip EA (error amplifier) is implemented to regulate output voltage. Through inner resistor

Load Compensation For Good CV Regulation

In UTC UC2000D, load compensation is implemented to achieve good load regulation. An offset voltage is

generated at inverter input of EA by an internal current flowing into the resister divider. The current is inversely

proportional to the voltage across pin COMP, as a result, it is inversely proportional to the output load current, thus

the output voltage can be compensated specially in zero loading condition. As the load current decreases from

full-load to no-load, the offset voltage at inverter input of EA will increase.

Current Sensing And Leading Edge Blanking

Cycle-by-Cycle current limiting is offered in UTC UC2000D current mode PWM control. The switch current is

detected by a sense resistor into the CS pin. An internal leading edge blanking circuit chops off the sensed voltage

spike at initial external power MOSFET on state so that the external RC filtering on sense input is no longer needed.

The PWM duty cycle is determined by the current sense input voltage and the EA output voltage.

Gate Drive

The internal power MOSFET in UTC UC2000D is driven by a dedicated gate driver for power switch control. Too

weak the gate drive strength results in higher conduction and switch loss of MOSFET while too strong gate drive

compromises EMI.

A good tradeoff is achieved through the built-in totem pole gate design with right output strength control.

Protection Control

Good power supply system reliability is achieved with its rich protection features including Cycle-by Cycle current

limiting (OCP), Over Loading Protection, Over Voltage Protection, Output Short-Circuit Protection and Under Voltage