ADA4805-1ARJZ-R2 datasheet(18/25 Pages) AD

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ADA4805-1/ADA4805-2

Data Sheet

Rev. B | Page 18 of 25

THEORY OF OPERATION

AMPLIFIER DESCRIPTION

The ADA4805-1/ADA4805-2 have a bandwidth of 105 MHz and

a slew rate of 160 V/μs. They have an input referred voltage

noise of only 5.9 nV/√Hz. The ADA4805-1/ADA4805-2 operate

over a supply voltage range of 2.7 V to 10 V and consume only

500 μA of supply current at VS = 5 V. The low end of the supply

range allows for −10% variation of a 3 V supply. The amplifiers

are unity-gain stable, and the input structure results in an

extremely low input 1/f noise. The ADA4805-1/ADA4805-2 use

a slew enhancement architecture, as shown in Figure 51. The

slew enhancement circuit detects the absolute difference

between the two inputs. It then modulates the tail current, ITAIL,

of the input stage to boost the slew rate. The architecture allows

higher slew rate and fast settling time with low quiescent

current while maintaining low noise.

+IN/+INx

VIN+

VIN–

INPUT

STAGE

TO DETECT

ABSOLUTE

VALUE

SLEW ENHANCEMENT CIRCUIT

ITAIL

–IN/−INx

Figure 51. Slew Enhancement Circuit

INPUT PROTECTION

The ADA4805-1/ADA4805-2 are fully protected from ESD

events, withstanding human body model ESD events of ±3.5 kV

and charged device model events of ±1.25 kV with no measured

performance degradation. The precision input is protected with

an ESD network between the power supplies and diode clamps

across the input device pair, as shown in Figure 52.

+IN/+INx

ESD

–VS

+VS

BIAS

TO THE REST OF THE AMPLIFIER

–IN/–INx

ESD

Figure 52. Input Stage and Protection Diodes

For differential voltages above approximately 1.2 V at room

temperature, and 0.8 V at 125°C, the diode clamps begin to

conduct. If large differential voltages must be sustained across

the input terminals, the current through the input clamps must

be limited to less than 10 mA. Series input resistors that are sized

appropriately for the expected differential overvoltage provide

the needed protection.

The ESD clamps begin to conduct for input voltages that are

more than 0.7 V above the positive supply and input voltages

more than 0.7 V below the negative supply. If an overvoltage

condition is expected, the input current must be limited to less

than 10 mA.

SHUTDOWN OPERATION

Figure 53 shows the ADA4805-1/ADA4805-2 shutdown

circuitry. To maintain very low supply current in shutdown

mode, no internal pull-up resistor is supplied; therefore, the

SHUTDOWNE pin must be driven high or low externally and

not be left floating. Pulling the SHUTDOWNE pin to ≥1 V below

midsupply turns the device off, reducing the supply current to

2.9 μA for a 5 V supply. When the amplifier is powered down,

its output enters a high impedance state. The output impedance

decreases as frequency increases. In shutdown mode, a forward

isolation of −62 dB can be achieved at 100 kHz (see Figure 25).

+VS

–VS

SHUTDOWN

ESD

2.2R

1.8R

1.1V

TO ENABLE

AMPLIFIER

Figure 53. Shutdown Circuit

The SHUTDOWNE pin is protected by ESD clamps, as shown in

Figure 53. Voltages beyond the power supplies cause these

diodes to conduct. To protect the SHUTDOWNE pin, ensure that

the voltage to this pin does not exceed 0.7 V above the positive

supply or 0.7 V below the negative supply. If an overvoltage

condition is expected, the input current must be limited to less

than 10 mA with a series resistor. Table 9 summarizes the

threshold voltages for the powered down and enabled modes for

various supplies.

Table 9. Threshold Voltages for Powered Down and Enabled

Modes

Mode

+3 V

+5 V

±5 V

+7 V/−2 V

Enabled

>+1.1 V

>+1.9 V

>−0.9 V

>+1.52 V

Powered Down

<+0.7 V

<+1.5 V

<−1.3 V

<+1.52 V

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