EXPOSED-DAP PACKAGE PCB MOUNTING

CONSIDERATIONS

The LM4841’s exposed-DAP (die attach paddle) packages

(MH,LQ) provide a low thermal resistance between the die

and the PCB to which the part is mounted and soldered. This

allows rapid heat transfer from the die to the surrounding

PCB copper traces, ground plane and, finally, surrounding

air. The result is a low voltage audio power amplifier that

produces 2.1W at

≤ 1% THD with a 4Ω load. This high power

is achieved through careful consideration of necessary ther-

mal design. Failing to optimize thermal design may compro-

mise the LM4841’s high power performance and activate

unwanted, though necessary, thermal shutdown protection.

The MH and LQ packages must have their exposed DAPs

soldered to a grounded copper pad on the PCB. The DAP’s

PCB copper pad is connected to a large grounded plane of

continuous unbroken copper. This plane forms a thermal

mass heat sink and radiation area. Place the heat sink area

on either outside plane in the case of a two-sided PCB, or on

an inner layer of a board with more than two layers. Connect

the DAP copper pad to the inner layer or backside copper

heat sink area with 32(4x8) (MH) vias or 6(3x2) LQ. The via

diameter should be 0.012in–0.013in with a 1.27mm pitch.

Ensure efficient thermal conductivity by plating-through and

solder-filling the vias.

Best thermal performance is achieved with the largest prac-

tical copper heat sink area. If the heatsink and amplifier

share the same PCB layer, a nominal 2.5in

necessary for 5V operation with a 4

Ω load. Heatsink areas

not placed on the same PCB layer as the LM4841MH and

LQ packages should be 5in

voltage and load resistance. The last two area recommen-

dations apply for 25˚C ambient temperature. Increase the

area to compensate for ambient temperatures above 25˚C.

The junction temperature must be held below 150˚C to pre-

vent activating the LM4841’s thermal shutdown protection.

The LM4841’s power de-rating curve in the Typical Perfor-

mance Characteristics shows the maximum power dissipa-

tion versus temperature. Example PCB layouts for the

exposed-DAP TSSOP and LQ packages are shown in the

Demonstration Board Layout section. Further detailed and

specific information concerning PCB layout and fabrication is

available in National Semiconductor’s AN1187.

PCB LAYOUT AND SUPPLY REGULATION

CONSIDERATIONS FOR DRIVING 3

Ω AND 4Ω LOADS

Power dissipated by a load is a function of the voltage swing

across the load and the load’s impedance. As load imped-

ance decreases, load dissipation becomes increasingly de-

pendent on the interconnect (PCB trace and wire) resistance

between the amplifier output pins and the load’s connec-

tions. Residual trace resistance causes a voltage drop,

which results in power dissipated in the trace and not in the

load as desired. For example, 0.1

Ω trace resistance reduces

the output power dissipated by a 4

Ω load from 2.1W to 2.0W.

This problem of decreased load dissipation is exacerbated

as load impedance decreases. Therefore, to maintain the

highest load dissipation and widest output voltage swing,

PCB traces that connect the output pins to a load must be as

wide as possible.

Poor power supply regulation adversely affects maximum

output power. A poorly regulated supply’s output voltage

decreases with increasing load current. Reduced supply

voltage causes decreased headroom, output signal clipping,

and reduced output power. Even with tightly regulated sup-

plies, trace resistance creates the same effects as poor

supply regulation. Therefore, making the power supply

traces as wide as possible helps maintain full output voltage

swing.

BRIDGE CONFIGURATION EXPLANATION

As shown in Figure 2, the LM4841 output stage consists of

two pairs of operational amplifiers, forming a two-channel

(channel A and channel B) stereo amplifier. (Though the

following discusses channel A, it applies equally to channel

B.)

Figure 2 shows that the first amplifier’s negative (-) output

serves as the second amplifier’s input. This results in both

amplifiers producing signals identical in magnitude, but 180˚

out of phase. Taking advantage of this phase difference, a

load is placed between −OUTA and +OUTA and driven dif-

ferentially (commonly referred to as “bridge mode”). This

results in a differential gain of

A

(1)

20028096

FIGURE 4. Single-ended output signal (Trace B) is devoid of transients. The SHUTDOWN pin is driven by a shutdown

signal (Trace A). The inverting output (Trace C) and the V

Ω BTL load.

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