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AS7263 数据表(PDF) 9 Page - ams AG |
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AS7263 数据表(HTML) 9 Page - ams AG |
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9 / 45 page ![]() ams Datasheet Page 9 [v1-00] 2016-Nov-25 Document Feedback AS7263 − Timing Characteristics Figure 8: I²C Slave Timing Diagram Figure 9: AS7263 SPI Timing Characteristics Note(s): 1. Guaranteed, not tested in production Symbol Parameter Conditions Min Typ Max Unit SPI Interface fSCK Clock Frequency 0 16 MHz tSCK_H Clock High Time 40 ns tSCK_L Clock Low Time 40 ns tSCK_RISE SCK Rise Time 5 ns tSCK_FALL SCK Fall Time 5 ns tCSN_S CSN Setup Time Time between CSN high-low transition to first SCK high transition 50 ns tCSN_H CSN Hold Time Time between last SCK falling edge and CSN low-high transition 100 ns tCSN_DIS CSN Disable Time 100 ns tDO_S Data-Out Setup Time 5 ns tDO_H Data-Out Hold Time 5 ns tDI_V Data-In Valid 10 ns SCL SDA tSU:STA tLOW tHIGH tF tR tHD:STA tSU:STO tSU:DAT tHD:DAT tBUF VIH VIL PS SP Stop Start |
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