PDSP2110, PDSP2111, PDSP2112, PDSP2113, PDSP2114

2006-01-23

4

Enlarged Character Font

Dimensions in inch (mm)

Write Cycle Timing Diagram

Notes:

1.

All input voltages are V

2.

These wave forms are not edge triggered.

3.

T

IDOD5202

C1

C2

C3

C4

C5

R1

R2

R3

R4

R5

R6

R7

2.85 (0.112)

0.65 (0.026) typ.

IDTC5054

Data

Wait

Data

Write control word -

clear bit enabled

Wait 130 ns

clear bit enabled

Write control word -

Switching Specifications

(over operating temperature range and V

Symbol

Description

Min.

Units

T

bw

Time Between Writes

30

ns

T

acc

(2)

Display Access Time

130

ns

T

as

Address Setup Time

10

ns

T

ces

Chip Enable Setup Time

0

ns

T

ah

Address Hold Time

20

ns

T

ceh

Chip Enable Hold Time

0

ns

T

w

Write Active Time

100

ns

T

ds

Data Valid Prior to Rising Edge

of Write

50

ns

T

dh

Data Hold Time

20

ns

T

rc

(1)

Reset Active Time

300

ns

T

clr

(3)

Clear Cycle Time

3.0

µs

Notes:

1)

Wait 300 ns min. after the reset function is turned off.

2)

T

3)

The Clear Cycle Time may be shortened by writing a second

Control Word with the Clear Bit disabled, 160 ns after the first

control word that enabled the Clear Bit.

The Flash RAM and Character RAM may not be accessed

until the Clear Cycle is complete.

Tas

Tah

Tceh

Tces

Tw

Tdh

Tds

Tbw

CE

D7-D0

WR

FL, A3-A0

see Notes

Tacc

see Notes

see Notes

see Notes