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LM5000 数据表(PDF) 12 Page - National Semiconductor (TI) |
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LM5000 数据表(HTML) 12 Page - National Semiconductor (TI) |
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12 / 18 page ![]() Operation (Continued) The LM5000EP is a current mode PWM regulator. The signal flow of this control scheme has two feedback loops, one that senses switch current and one that senses output voltage. To keep a current programmed control converter stable above duty cycles of 50%, the inductor must meet certain criteria. The inductor, along with input and output voltage, will determine the slope of the current through the inductor (see Figure 4 (a)). If the slope of the inductor current is too great, the circuit will be unstable above duty cycles of 50%. The LM5000EP provides a compensation pin (COMP) to customize the voltage loop feedback. It is recommended that a series combination of R C and CC be used for the compen- sation network, as shown in Figure 1. The series combina- tion of R C and CC introduces pole-zero pair according to the following equations: where R O is the output impedance of the error amplifier, 850k Ω. For most applications, performance can be opti- mized by choosing values within the range 5k Ω≤ R C ≤ 20kΩ and 680pF ≤ C C ≤ 4.7nF. COMPENSATION This section will present a general design procedure to help insure a stable and operational circuit. The designs in this datasheet are optimized for particular requirements. If differ- ent conversions are required, some of the components may need to be changed to ensure stability. Below is a set of general guidelines in designing a stable circuit for continu- ous conduction operation (loads greater than 100mA), in most all cases this will provide for stability during discontinu- ous operation as well. The power components and their effects will be determined first, then the compensation com- ponents will be chosen to produce stability. INDUCTOR SELECTION To ensure stability at duty cycles above 50%, the inductor must have some minimum value determined by the mini- mum input voltage and the maximum output voltage. This equation is: where fs is the switching frequency, D is the duty cycle, and R DSON is the ON resistance of the internal switch. This equation is only good for duty cycles greater than 50% (D>0.5). The inductor ripple current is important for a few reasons. One reason is because the peak switch current will be the average inductor current (input current) plus ∆i L. Care must be taken to make sure that the switch will not reach its current limit during normal operation. The inductor must also be sized accordingly. It should have a saturation current rating higher than the peak inductor current expected. The output voltage ripple is also affected by the total ripple cur- rent. DC GAIN AND OPEN-LOOP GAIN Since the control stage of the converter forms a complete feedback loop with the power components, it forms a closed- loop system that must be stabilized to avoid positive feed- back and instability. A value for open-loop DC gain will be required, from which you can calculate, or place, poles and zeros to determine the crossover frequency and the phase margin. A high phase margin (greater than 45˚) is desired for the best stability and transient response. For the purpose of stabilizing the LM5000EP, choosing a crossover point well below where the right half plane zero is located will ensure sufficient phase margin. A discussion of the right half plane zero and checking the crossover using the DC gain will follow. OUTPUT CAPACITOR SELECTION The choice of output capacitors is somewhat more arbitrary. It is recommended that low ESR (Equivalent Series Resis- tance, denoted R ESR) capacitors be used such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR ca- pacitors may be used but will require more compensation which will be explained later on in the section. The ESR is also important because it determines the output voltage ripple according to the approximate equation: ∆V OUT ) 2 ∆i LRESR (in Volts) After choosing the output capacitor you can determine a pole-zero pair introduced into the control loop by the follow- ing equations: Where R L is the minimum load resistance corresponding to the maximum load current. The zero created by the ESR of the output capacitor is generally very high frequency if the ESR is small. If low ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the High Output Capacitor ESR Compensation section. RIGHT HALF PLANE ZERO A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the phase, subtracting another 90˚ in the phase plot. This can cause undesirable effects if the control loop is influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be designed to have a bandwidth of 1⁄2 the frequency of the RHP zero or less. This zero occurs at a frequency of: www.national.com 12 |
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