ADA4927-2YCPZ-R2 datasheet(7/25 Pages) AD

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Data Sheet

ADA4927-1/ADA4927-2

Rev. B | Page 7 of 25

ABSOLUTE MAXIMUM RATINGS

Table 7.

Parameter

Rating

Supply Voltage

11 V

Power Dissipation

See Figure 4

Input Currents +IN, −IN, PD

±5 mA

Storage Temperature Range

−65°C to +125°C

Operating Temperature Range

−40°C to +105°C

Lead Temperature (Soldering, 10 sec)

300°C

Junction Temperature

150°C

Stresses at or above those listed under Absolute Maximum

Ratings may cause permanent damage to the product. This is a

stress rating only; functional operation of the product at these

or any other conditions above those indicated in the operational

section of this specification is not implied. Operation beyond

the maximum operating conditions for extended periods may

affect product reliability.

THERMAL RESISTANCE

θJA is specified for the device (including exposed pad) soldered

to a high thermal conductivity 2s2p circuit board, as described

in EIA/JESD 51-7.

Table 8.

Package Type

θJA

Unit

16-Lead LFCSP (Exposed Pad)

°C/W

24-Lead LFCSP (Exposed Pad)

°C/W

MAXIMUM POWER DISSIPATION

The maximum safe power dissipation in the ADA4927 package

is limited by the associated rise in junction temperature (TJ) on

the die. At approximately 150°C, which is the glass transition

temperature, the plastic changes the properties. Even

temporarily exceeding this temperature limit can change the

stresses that the package exerts on the die, permanently shifting

the parametric performance of the ADA4927. Exceeding a

junction temperature of 150°C for an extended period can result

in changes in the silicon devices, potentially causing failure.

The power dissipated in the package (PD) is the sum of the

quiescent power dissipation and the power dissipated in the

package due to the load drive. The quiescent power is the voltage

between the supply pins (VS) times the quiescent current (IS).

The power dissipated due to the load drive depends upon the

particular application. The power due to load drive is calculated

by multiplying the load current by the associated voltage drop

across the device. RMS voltages and currents must be used in

these calculations.

Airflow increases heat dissipation, effectively reducing θJA. In

addition, more metal directly in contact with the package leads/

exposed pad from metal traces, throughholes, ground, and power

planes reduces θJA.

Figure 4 shows the maximum safe power dissipation in the

package vs. the ambient temperature for the single 16-lead LFCSP

(87°C/W) and the dual 24-lead LFCSP (47°C/W) on a JEDEC

standard

4-layer board with the exposed pad soldered to a PCB pad that

is connected to a solid plane.

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

–40

–20

AMBIENT TEMPERATURE (°C)

100

ADA4927-2

ADA4927-1

Figure 4. Maximum Power Dissipation vs.

Ambient Temperature for a 4-Layer Board

ESD CAUTION

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