Data Sheet

ADA4932-1/ADA4932-2

Rev. E | Page 21 of 27

Similar to the case of a conventional op amp, the output noise

voltage densities can be estimated by multiplying the input-

referred terms at +IN and −IN by the appropriate output factor,

where:



2

1

N

β

β

G





2

is the circuit noise gain.

G1

F1

G1

1

R

R

R

β





and

G2

F2

G2

2

R

R

R

β





are the feedback factors.

β2 = β, and the noise gain becomes

G

F

N

R

R

β

G







1

1

square of the individual output noise terms.







8

1

i

2

nOi

nOD

v

v

Table 12 and Table 13 list several common gain settings,

associated resistor values, input impedance, and output noise

density for both balanced and unbalanced input configurations.

IMPACT OF MISMATCHES IN THE FEEDBACK

NETWORKS

As previously mentioned, even if the external feedback networks

loop still forces the outputs to remain balanced. The amplitudes

of the signals at each output remain equal and 180° out of phase.

The input-to-output differential mode gain varies proportionately

to the feedback mismatch, but the output balance is unaffected.

2(β1 − β2)/(β1 + β2)

When β1 = β2, this term goes to zero and there is no differential

noise). The extreme case occurs when one loop is open and the

The feedback loops are nominally matched to within 1% in

most applications, and the output noise and offsets due to the

by a large amount, it is necessary to include the gain term from

present at the output of (2.5 V)(0.67) = 1.67 V. The differential

output noise contribution is (9.6 nV/√Hz)(0.67) = 6.4 nV/√Hz.

Both of these results are undesirable in most applications;

therefore, it is best to use nominally matched feedback factors.

Mismatched feedback networks also result in a degradation of

the ability of the circuit to reject input common-mode signals,

much the same as for a four-resistor difference amplifier made

from a conventional op amp.

As a practical summarization of the above issues, resistors of 1%

tolerance produce a worst-case input CMRR of approximately

40 dB, a worst-case differential-mode output offset of 25 mV

and no significant degradation in output balance error.

CALCULATING THE INPUT IMPEDANCE FOR AN

APPLICATION CIRCUIT

The effective input impedance of a circuit depends on whether

the amplifier is being driven by a single-ended or differential

signal source. For balanced differential input signals, as shown

+IN

–IN

ADA4932-1/

ADA4932-2

Figure 56. ADA4932-1/ADA4932-2 Configured for Balanced (Differential) Inputs

For an unbalanced, single-ended input signal (see Figure 57),

the input impedance is































F

G

F

G

se

IN

R

R

R

R

R

2

1

,

ADA4932-1/

ADA4932-2

Figure 57. The ADA4932-1/ADA4932-2 with Unbalanced (Single-Ended) Input

The input impedance of the circuit is effectively higher than it is

for a conventional op amp connected as an inverter because a

fraction of the differential output voltage appears at the inputs

as a common-mode signal, partially bootstrapping the voltage

amplifier input terminals can be easily determined by noting that

the voltage at the inverting input is equal to the noninverting

output voltage divided down by the voltage divider that is formed

input terminals due to negative voltage feedback and is in phase