ADA4940-1ARZ-R7 datasheet(22/30 Pages) AD

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ADA4940-1/ADA4940-2

Data Sheet

Rev. D | Page 22 of 30

THEORY OF OPERATION

The ADA4940-1/ADA4940-2 are high speed, low power

differential amplifiers fabricated on Analog Devices advanced

dielectrically isolated SiGe bipolar process. They provide two

closely balanced differential outputs in response to either

differential or single-ended input signals. An external feedback

network that is similar to a voltage feedback operational

amplifier sets the differential gain. The output common-mode

voltage is independent of the input common-mode voltage and

is set by an external voltage at the VOCM terminal. The PNP

input stage allows input common-mode voltages between the

negative supply and 1.2 V below the positive supply. A rail-to-

rail output stage supplies a wide output voltage range. The

DISABLE pin can reduce the supply current of the amplifier to

13.5 μA.

Figure 62 shows the ADA4940-1/ADA4940-2 architecture.

The differential feedback loop consists of the differential trans-

conductance GDIFF working through the GO output buffers and

the RF/RG feedback networks. The common-mode feedback

loop is set up with a voltage divider across the two differential

outputs to create an output voltage midpoint and a common-

mode transconductance, GCM.

GCM

GDIFF

VREF

–OUT

+OUT

+DIN

–DIN

+IN

–IN

VOCM

Figure 62. ADA4940-1/ADA4940-2 Architectural Block

The differential feedback loop forces the voltages at +IN and −IN

to equal each other. This fact sets the following relationships:

OUT







OUT









Subtracting the previous equations gives the relationship that

shows RF and RG setting the differential gain.

(

V+OUT − V−OUT) = (+DIN – (−DIN)) ×

The common-mode feedback loop drives the output common-

mode voltage that is sampled at the midpoint of the output

voltage divider to equal the voltage at VOCM. This results in the

following relationships:

V+OUT = VOCM +

OUT,

V−OUT = VOCM −

OUT,

Note that the differential amplifier’s summing junction input

voltages, +IN and −IN, are set by both the output voltages and

the input voltages.



































OUT





































OUT

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