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PIC18F442-E/P 数据表(PDF) 76 Page - Microchip Technology |
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PIC18F442-E/P 数据表(HTML) 76 Page - Microchip Technology |
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76 / 332 page  PIC18FXX2 DS39564B-page 74 2002 Microchip Technology Inc. FIGURE 8-1: INTERRUPT LOGIC TMR0IE GIEH/GIE GIEL/PEIE Wake-up if in SLEEP mode Interrupt to CPU Vector to location 0008h INT2IF INT2IE INT2IP INT1IF INT1IE INT1IP TMR0IF TMR0IE TMR0IP RBIF RBIE RBIP IPEN TMR0IF TMR0IP INT1IF INT1IE INT1IP INT2IF INT2IE INT2IP RBIF RBIE RBIP INT0IF INT0IE GIEL/PEIE Interrupt to CPU Vector to Location IPEN IPE 0018h Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit Peripheral Interrupt Flag bit Peripheral Interrupt Enable bit Peripheral Interrupt Priority bit TMR1IF TMR1IE TMR1IP XXXXIF XXXXIE XXXXIP Additional Peripheral Interrupts TMR1IF TMR1IE TMR1IP High Priority Interrupt Generation Low Priority Interrupt Generation XXXXIF XXXXIE XXXXIP Additional Peripheral Interrupts GIE/GIEH |
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