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P9025AC-RNBGI8 数据表(PDF) 7 Page - Integrated Device Technology |
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P9025AC-RNBGI8 数据表(HTML) 7 Page - Integrated Device Technology |
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7 / 20 page ![]() 09/01/15 7 5W, QI WIRELESS POWER RECEIVER WITH INTEGRATED RECTIFIER AND LDO OUTPUT P9025AC DATASHEET 11 NC1 NC Not internally connected. This pin may be connected to others to facilitate routing or to improve thermal performance. 12 OUT O Regulated 5.3V output voltage. Connect a 1μF in parallel with 4.7 μF capacitor between the pin and ground. 13 NC2 NC Not internally connected. This pin may be connected to others to facilitate routing or to improve thermal performance. 14 EN I Active-low enable pin. The chip is suspended and placed in low-current (sleep) mode when this pin is pulled high. This pin has internal pulldown resistor to Analog Ground (AGND). 15 TEOP I Active-high over-temperature input pin. When pulled high, the chip will disable the LDO output and send a WPC End-of-Power packet with code 0x03 (over-temperature code). This pin has an internal pull down resistor to ground. 16 NC3 NC Not internally connected. This pin may be connected to others to facilitate routing or to improve thermal performance. 17 CLAMP2 I AC clamp input 2. Connect a 0.47uF capacitor from this pin to AC2 pin. 18 PGND2 - Power ground for the AC clamp FETs. 19 CLAMP1 I AC clamp input 1. Connect a 0.47uF capacitor from this pin to AC1 pin. 20 FOD2 I FOD2 adjustment. A resistor between this pin and AGND sets the FOD offset value used in the internal FOD calculation. 21 ACM1 I AC Modulation input 1. Connect a 22nF capacitor from this pin to AC1 pin. 22 PGND1 - Power ground for the full-wave rectifier. 23 ACM2 I AC Modulation input 2. Connect a 22nF capacitor from this pin to AC2 pin. 24 NC4 NC Not internally connected. This pin may be connected to others to facilitate routing or to improve thermal performance. 25 FOD1 I A resistor between this pin and Analog Ground selects the FOD compensation curve that is used for the internal FOD calculation. 26 SDA I/O I2C data port. Connect a 2.2k pullup resistor from this pin to OUT (PIN) voltage or the system IO voltage rail. If not used, connect to ground. 27 SCL I I2C clock port. Connect a 2.2k pullup resistor from this pin to OUT voltage or the system IO voltage rail. If not used, connect to ground. 28 AGND - Analog Ground connection. 29 VDD O Internal voltage supply. Connect a 1uF capacitor between this pin and Analog Ground. Do not connect any external load to this pin. 30 AC2 I AC2 input to the Internal full-wave rectifier. 31 PGND - Power ground for the full-wave rectifier. 32 STAT O Status output. A logic low state indicates that power is being transferred. Pin # Name Type Function |
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