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ADM7171ACPZ-4.2-R7 数据表(PDF) 19 Page - Analog Devices

部件名 ADM7171ACPZ-4.2-R7
功能描述  Fast transient response
PDF  24 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADM7171ACPZ-4.2-R7 数据表(HTML) 19 Page - Analog Devices

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ADM7171
Data Sheet
Rev. C | Page 18 of 23
The tolerance of the capacitor (TOL) is assumed to be 10%, and
CBIAS is 4.35 μF at 3.0 V, as shown in Figure 57.
Substituting these values in Equation 1 yields
CEFF = 4.35 μF × (1 − 0.15) × (1 − 0.1) = 3.33 μF
Therefore, the capacitor chosen in this example meets the
minimum capacitance requirement of the LDO over temper-
ature and tolerance at the chosen output voltage of 3.0 V.
To guarantee the performance of the ADM7171, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
PROGRAMMABLE PRECISION ENABLE
The ADM7171 uses the EN pin to enable and disable the VOUT
pins under normal operating conditions. As shown in Figure 58,
when a rising voltage on EN crosses the upper threshold,
typically 1.2 V, VOUT turns on. When a falling voltage on EN
crosses the lower threshold, typically 1.1 V, VOUT turns off. The
hysteresis of the EN threshold is approximately 100 mV.
Figure 58. Typical VOUT Response to EN Pin Operation
The upper and lower thresholds are user programmable and can
be set higher than the nominal 1.2 V threshold by using two
resistors. The resistance values, REN1 and REN2, can be
determined from
REN1 = REN2 × (VIN − 1.2 V)/1.2 V
where:
REN2 is nominally 10 kΩ to 100 kΩ.
VIN is the desired turn-on voltage.
The hysteresis voltage increases by the factor
(REN1 + REN2)/REN1
For the example shown in Figure 59, the enable threshold is
3.6 V with a hysteresis of 300 mV.
Figure 59. Typical EN Pin Voltage Divider
Figure 58 shows the typical hysteresis of the EN pin. This
prevents on/off oscillations that can occur due to noise
on the EN pin as it passes through the threshold points.
UNDERVOLTAGE LOCKOUT
The ADM7171 also incorporates an internal undervoltage
lockout circuit to disable the output voltage when the input
voltage is less than the minimum input voltage rating of the
regulator. The upper and lower thresholds are internally fixed
with about 200 mV of hysteresis. This hysteresis prevents on/off
oscillations that can occur when caused by noise on the input
voltage as it passes through the threshold points.
SOFT START
The ADM7171 uses an internal soft start (SS pin open) to limit the
inrush current when the output is enabled. The start-up time for
the 5.0 V option is approximately 380 μs from the time the EN
active threshold is crossed to when the output reaches 90% of its
final value. As shown in Figure 60, the start-up time is nearly
independent of the output voltage setting.
Figure 60. Typical Start-Up Behavior
VEN (V)
1.30
1.25
1.20
1.15
1.10
1.05
1.00
0
0.5
1.0
1.5
2.0
2.5
3.0
VOUT
SENSE
VIN
EN
ADM7171
GND
CIN
4.7µF
COUT
4.7µF
OFF
ON
VOUT = 5.0V
VIN = 6.0V
REN1
200kΩ
REN2
100kΩ
VOUT
VIN
TIME (ms)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0
0.5
1.0
2.0
3.0
4.0
5.0
1.5
2.5
3.5
4.5
VEN
2.5V
3.0V
5.0V



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