THS4130, THS4131

HIGHSPEED, LOW NOISE, FULLY DIFFERENTIAL I/O AMPLIFIERS

SLOS318E − MAY 2000 − REVISED JANUARY 2004

21

POST OFFICE BOX 655303

PRINCIPLES OF OPERATION

circuit layout considerations

To achieve the levels of high frequency performance of the THS413x, follow proper printed-circuit board high

frequency design techniques. A general set of guidelines is given below. In addition, a THS413x evaluation

board is available to use as a guide for layout or for evaluating the device performance.

components with a low inductive ground connection. However, in the areas of the amplifier inputs and

output, the ground plane can be removed to minimize the stray capacitance.

capacitor on each supply terminal. It may be possible to share the tantalum among several amplifiers

depending on the application, but a 0.1-

µF ceramic capacitor should always be used on the supply terminal

of every amplifier. In addition, the 0.1-

µF capacitor should be placed as close as possible to the supply

terminal. As this distance increases, the inductance in the connecting trace makes the capacitor less

effective. The designer should strive for distances of less than 0.1 inches between the device power

terminals and the ceramic capacitors.

inductance in the socket pins will often lead to stability problems. Surface-mount packages soldered directly

to the printed-circuit board is the best implementation.

series inductance has been minimized. To realize this, the circuit layout should be made as compact as

possible, thereby minimizing the length of all trace runs. Particular attention should be paid to the inverting

input of the amplifier. Its length should be kept as short as possible. This will help to minimize stray

capacitance at the input of the amplifier.

frequency amplifier circuits for several reasons. First, because of the extremely low lead inductance of

surface-mount components, the problem with stray series inductance is greatly reduced. Second, the small

size of surface-mount components naturally leads to a more compact layout thereby minimizing both stray

inductance and capacitance. If leaded components are used, it is recommended that the lead lengths be

kept as short as possible.