VMP1 datasheet(2/4 Pages) ETC

2 / 4 page

LNK.

ACT.

SPEED

VMP 1

RST

VMP 1

IO1

Product Overview

PEP’s VME PowerPC Processor

board with Floating point unit

based on the MPC8240 is a

straight forward computing

design.

CPU, Memory and DMA

The VMP1 is a comprehensive

computing platform realized as a lean

CPU design with only those functions

required for basic industrial

calculation tasks. It addresses the need

for increasing computing capacity

while reducing the number of system

components and taking up less space.

Based on the MPC8240, a highly

integrated microprocessor containing

a PowerPC MPC603e core, two

different clock versions, 200 MHz and

266 MHz, both with an FPU unit will

be initially available.

Anticipating the VMP1's use in data

critical applications, the memory data

path contains a selectable in-line ECC

controller which can provide SDRAM

single bit error correct or double bit

error detect.

For mass data transmission a dual

channel DMA controller is provided.

It can be programmed directly or

through the use of descriptor chains

located in memory. Data can thus be

moved from PCI to memory or vice

versa, memory to memory, or PCI to

PCI.

PCI bus and PCI Expansion

capability

PCI is used as the local bus to connect

the MPC8240 with the Fast Ethernet

controller and the PCI/VME bridge.

Moreover, it is routed to a 100 pin PCI

expansion connector that can be used

to add further functionality to the

VMP1. One or two VMP1-IO modules

can be plugged together with the

VMP1 (e.g. two PMC slots can be

added) resulting in a total package of

either 8HP or 12HP.

VME interface

The VMEbus interface (Universe 2)

delivers beside all functionality that is

VMP1

needed by a VME CPU:

– automatic First-Slot-Detection

– integral FIFO buffers for multiple

transactions in both directions

– programmable DMA controller with

linked list support.

LAN

The i82559 10/100 Mbps Fast

Ethernet controller with an integrated

10/100 Mbps physical layer device is

the foremost solution for PCI board

LAN designs. It combines a low power

consumption with a small package

design which is ideal for power and

space constrained environments.

Serial ports

Two RS232 serial ports are realized

with the 16C2550 UART and supports

baud rates up to 1.5Mbps.

Support

One of the prime advantages of

utilizing the existing, time-tested, and

proven MPC603e core is the legacy

and infrastructure of support that

currently exists. All notable third-

party software tool vendors presently

endorsing the PowerPC architecture

have announced tools also for the

MPC8240. It supports processor

control and visibility through the

JTAG/COP (common on-chip

processor) interface that is accessible

on VMP1. Utilizing third party tools,

the developer can access and control

the processor. It also has standard

IEEE 1149.1a-1993 compliant

boundary scan capability.The ECC

data path has a mechanism to

manually inject errors into memory

Front-Panel

VMP1

HIGH-

PERFORMANCE

CPUs

SINGLE-BOARD

COMPUTERS

for use with maintenance and

diagnostic utilities. Further a watch

point and capture register on the

internal bus as well as a set of address

attributes on the external memory

and PCI buses aid in debugging

analysis.

Universal Boot Loader

The VMP1 employs an operating

system independent boot loader that

enables the loading of any OS.This

boot loader makes an update of the

Flash contents and accomplishes an

automatic download from Flash to

SDRAM before booting the OS. For

high performance reasons the OS is

started from the SDRAM.

PUSH

BUTTONS/

LED’S

SERIAL

INTERFACE

SERIAL

INTERFACE

FAST

ETHERNET

SYSTEM

LOGIC

FLASH

FLASH SOCKET

DiskOnChip or NVSRAM

CPU

Power PC

MPC8240

DEBUG

SDRAM

100MHz

ECC

PCI

EXPANSION

CONNECTOR

POWER

SUPPLY

RESET

GENERATION

RTC

EEPROM

VME

INTERFACE

Memory Bus

(64bit)

Port X (8 bit wide)

PCI Bus

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