LM80 datasheet(3/29 Pages) NSC

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Pin Descriptions (Continued)

Name(s)

Number

of Pins

Type

Description

FAN1-FAN2

4-5

Digital Inputs

0 to V

+ fan tachometer inputs.

BTI

Digital Input

Board Temperature Interrupt driven by O.S. outputs of additional

temperature sensors such as LM75. Provides internal pull-up of

10 k

Ω.

CI (Chassis

Intrusion)

Digital I/O

An active high input from an external circuit which latches a Chassis

Intrusion event. This line can go high without any clamping action

regardless of the powered state of the LM80. The LM80 provides an

internal open drain on this line, controlled by Bit 5 of the

Configuration Register, to provide a minimum 10 ms reset of this

line.

GND

GROUND

Internally connected to all of the digital circuitry.

+ (+2.8V to

+5.75V)

POWER

+3.3V or +5V V

+ power. Bypass with the parallel combination of

10 µF (electrolytic or tantalum) and 0.1 µF (ceramic) bypass

capacitors.

INT

Digital Output

Non-Maskable Interrupt (open source)/Interrupt Request (open

drain). The mode is selected with Bit 5 of the Configuration Register

and the output is enabled when Bit 1 of the Configuration Register

is set to 1. The default state is disabled.

GPO (Power

Switch Bypass)

Digital Output

An active low open drain output intended to drive an external

P-channel power MOSFET for software power control.

NTEST_IN/

RESET_IN

Digital Input

An active-low input that enables NAND Tree board-level connectivity

testing. Refer to Section 10.0 on NAND Tree testing. Whenever

NAND Tree connectivity is enabled the LM80 is also reset to its

power on state.

RST_OUT/OS

Digital Output

Master Reset, 5 mA driver (open drain), active low output with a

10 ms minimum pulse width. Available when enabled via Bit 4 in

Configuration Register and Bit 7 of the Fan Divisor/RST_OUT/OS

this output as an active low Overtemperature Shutdown (OS).

GNDA

GROUND

Internally connected to all analog circuitry. The ground reference for

all analog inputs. This pin needs to be taken to a low noise analog

ground plane for optimum performance.

IN6-IN0

15-21

Analog Inputs

0V to 2.56V full scale range Analog Inputs.

A0/NTEST_OUT

Digital I/O

The lowest order bit of the Serial Bus Address. This pin functions as

an output when doing a NAND Tree test.

A1-A2

23-24

Digital Inputs

The two highest order bits of the Serial Bus Address.

TOTAL PINS

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