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WM8727ED/V 数据表(PDF) 10 Page - Wolfson Microelectronics plc |
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WM8727ED/V 数据表(HTML) 10 Page - Wolfson Microelectronics plc |
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10 / 16 page ![]() WM8727 Production Data w PD Rev 4.1 April 2004 10 AUDIO DATA SAMPLING RATES The master clock for WM8727 supports audio sampling rates from 128fs to 768fs, where fs is the audio sampling frequency (LRCIN) typically 32kHz, 44.1kHz, 48kHz, 96kHz or 192kHz. The master clock is used to operate the digital filters and the noise shaping circuits. The WM8727 has a master clock detection circuit that automatically determines the relation between the master clock frequency and the sampling rate (to within +/- 8 master clocks). If there is a greater than 8 clocks error, the interface shuts down the DAC and mutes the output. The master clock should be synchronised with LRCIN, although the WM8727 is tolerant of phase differences or jitter on this clock. MASTER CLOCK FREQUENCY (MHZ) (MCLK) SAMPLING RATE (LRCIN) 128fs 192fs 256fs 384fs 512fs 768fs 32kHz 4.096 6.144 8.192 12.288 16.384 24.576 44.1kHz 5.6448 8.467 11.2896 16.9344 22.5792 33.8688 48kHz 6.144 9.216 12.288 18.432 24.576 36.864 96kHz 12.288 18.432 24.576 36.864 Unavailable Unavailable 192kHz 24.576 36.864 Unavailable Unavailable Unavailable Unavailable Table 1 Master Clock Frequencies Versus Sampling Rate |
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