RESET OUTPUT (Pin 6)

The Reset Output is an active low logic signal provided to re-

set a system microcontroller on power up and in the event

that the Main Output supply falls out of regulation. This out-

ever the Main Output supply is below 4.45V or is pulled

above 5.75V. This general reset prevents erratic system op-

eration which may occur with out-of-specification supply po-

tentials.

The Reset Output has an active pull down to ground and a

passive pull-up (througha4k

Ω resistor) to the Main Output

to ensure voltage compatibility with the system supply. Ca-

pacitive loading on this reset line will directly affect the rise

time of the reset signal. The Reset Output will maintain a

logic low level with a Main Output voltage of only 1V. Below

1V the active pull-down device switches OFF (sink current of

only 500 µA), but with such a low supply potential, system

controllers are generally inoperative.

The Reset Output has a built-in delay time interval which is

programmable by the selection of the delay capacitor.

DELAY CAPACITOR (Pin 7)

The Delay Capacitor (C

the Reset Output remains low after the Main Output has es-

tablished normal operating condition. This feature holds the

system in reset for a time to allow all load circuitry to be prop-

erly biased before executing functions. This interval is ap-

plied at power-up and following any event that may trigger

the system reset function.

Figure 2 illustrates the delayed reset generator. Two com-

parators continually monitor the Main Output supply. Window

comparators C1 and C2 detect if the Main Supply is below

4.6V or exceeds 5.5V typically. If this is true (at power-on, for

example) the control logic turns ON the discharge transistor

and holds C

a logic low system Reset signal within 2 µs after detecting

the out of regulation condition.

The Delay Capacitor remains discharged until the window

comparator senses that the Main Output is within normal op-

erating range (C1 and C2 outputs are both low). When this

condition is met, the discharge transistor is turned OFF and

C

source. The Reset Output will remain low un the delay ca-

pacitor has reached 4V, at which point it will go high and the

system will begin normal operation. This delay time interval

is controlled by the selection of C

mined from the following equation:

T

DELAY

Typically a 0.1 µF capacitor will produce a delay interval of

50 ms.

To ensure a consistent delay time interval, the discharge

transistor is always latched ON by the window comparators,

and can not be switched OFF to start a new delay interval

until C

0.9V. This sets a fixed starting voltage (0.9V) and ending

voltage (4V) for the charging of the Delay Capacitor.

ON/OFF INPUT (Pin 1)

The ON/OFF Input enables both the Main and Tracking out-

puts. In a typical application this input is connected to the in-

put supply through a series resistor (nominally 22 k

Ω) and a

switch (Ignition, as an example). When the switch is closed

this input is pulled high and switches ON both regulator out-

puts. This input is internally clamped to a 7V zener diode

through a series 1 k

Ω resistor. The external series resistor

together with an optional 0.1 µF capacitor to ground are op-

tional to provide filtering and current limiting to withstand any

transients that may appear on the input supply in order to

maintain normal operation of the system.

The switching threshold of the ON/OFF comparator has 2V

of hysteresis to ensure noise free control of the system. To

turn the regulators ON this input must be taken above 4V. To

turn the system OFF the ON/OFF Input must be open cir-

cuited or taken below 2V.

DS012906-18

FIGURE 2. Reset Generator

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