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LMP8276 数据表(PDF) 3 Page - National Semiconductor (TI) |
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LMP8276 数据表(HTML) 3 Page - National Semiconductor (TI) |
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3 / 5 page ![]() 5V Electrical Characteristics (Note 7) (Continued) Unless otherwise specified, all limits guaranteed for T A = 25˚C, VS = 5V, GND= 0, -2V ≤V CM ≤27V. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min Typ (Note 4) Max Units SR Slew Rate (Note 6) 0.7 V/µs BW Bandwidth 80 KHz Noise 0.1Hz ro 10Hz TBD µVpp Spectral Density TBD nV/ √Hz Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics Tables. Note 2: Human body model, 1.5 k Ω in series with 100 pF. Machine model: 0Ω in series with 200 pF. Note 3: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is PD =(TJ(MAX) -TA)/ θJA . All numbers apply for packages soldered directly onto a PC board. Note 4: Typical values represent the most likely parametric norm. Note 5: Positive current corresponds to current flowing into the device. Note 6: Slew rate is the average of the rising and falling slew rates. Note 7: Electrical table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very limited self-heating of the device. Connection Diagram 8–Pin SOIC 20130802 Top View Application Note The LMP8271, LMP8276 are single supply amplifier with a fixed gain of 20 and an extended common mode voltage range of -2V to 36V. The fixed gain is achieved in two separate stages, a pre-amplifier with gain of +10 and a second stage amplifier with gain of +2. A block diagram of the LMP8271, LMP8276 is shown in Figure 1. The overall offset of the LMP8271, LMP8276 is minimized by trimming amplifier A1. This is done so that the output re- ferred offset of A1 cancels the input referred offset of A2 or 10V OS1 =-VOS2 Because of this offset voltage relationship, the offset of each individual amplifier stage maybe more than the limit speci- fied for the overall system in the datasheet tables. Care must be given when pin 3 and 4, A1 and A2, are connected to each other. If the signal going from A1 to A2 is amplified or attenuated (by use of amplifiers and resistors), the overall LMP8271, LMP8276 offset will be affected as a result. Fil- tering the signal between A1 and A2 or simply connecting the two pins will not change the offset of the LMP8271, LMP8276. Referencing input referred offset voltages, the following re- lationship holds: If the signal on pin 3 is scaled, attenuated or amplified, by a factor X then the offset of the overall system will become: 20130803 FIGURE 1. www.national.com 3 |
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