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LMC2001 数据表(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LMC2001
功能描述  High Precision, 6MHz Rail-To-Rail Output Operational Amplifier
PDF  11 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LMC2001 数据表(HTML) 2 Page - National Semiconductor (TI)

  LMC2001 Datasheet HTML 1Page - National Semiconductor (TI) LMC2001 Datasheet HTML 2Page - National Semiconductor (TI) LMC2001 Datasheet HTML 3Page - National Semiconductor (TI) LMC2001 Datasheet HTML 4Page - National Semiconductor (TI) LMC2001 Datasheet HTML 5Page - National Semiconductor (TI) LMC2001 Datasheet HTML 6Page - National Semiconductor (TI) LMC2001 Datasheet HTML 7Page - National Semiconductor (TI) LMC2001 Datasheet HTML 8Page - National Semiconductor (TI) LMC2001 Datasheet HTML 9Page - National Semiconductor (TI) Next Button
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
Human Body Model
2500V
Machine Model
150V
Differential Input Voltage
± Supply Voltage
Supply Voltage (V
+ -V-)
5.6V
Current At Input Pin
30mA
Current At Output Pin
30mA
Current At Power Supply Pin
(Note 3)
50mA
Lead Temperature (soldering, 10
sec)
260˚C
Storage Temperature Range
-65˚C to 150˚C
Junction Temperature (T
J )
(Note 4)
150˚C
Operating Ratings (Note 1)
Supply voltage
4.75V to 5.25V
Temperature Range
LMC2001AI
-40˚C
≤ T
J ≤ 85˚C
LMC2001AC
0˚C
≤ T
J ≤ 70˚C
Thermal resistance (
θ
JA)
M Package, 8-pin Surface Mount
180˚C /W
M5 Package, SOT23-5
274˚C /W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J = 25˚C, V
+ = 5V, V- = 0V, V
CM = 2.5V, VO = 2.5V and RL > 1MΩ.
Boldface limits apply at the temperature extremes.
Symbol
Parameter
Conditions
Typ
(Note 5)
Limit(Note 6)
Units
V
OS
Input Offset Voltage
(Note 11)
0.5
40
60
µV
max
Offset Calibration Time
5
30
ms
TCV
OS
Input Offset Voltage
(Note 12)
0.015
µV/˚C
Long-Term Offset Drift
(Note 8)
0.006
µV/month
Lifetime V
OS drift
(Note 8)
2.5
5
µV Max
I
IN
Input Current
(Note 9)
-3
pA
I
OS
Input Offset Current
6
pA
R
IND
Input Differential Resistance
9
M
Ω
CMRR
Common Mode Rejection
Ratio
0V
≤ V
CM ≤ 3.5V
120
100
dB
min
0.1V
≤ V
CM ≤ 3.5V
110
90
dB
min
PSRR
Power Supply
Rejection Ratio
4.75V
≤ V+ ≤ 5.25V
120
95
90
dB
min
A
VOL
Large Signal Voltage Gain
(Note 7)
R
L= 10kΩ
137
105
100
dB
min
R
L =2kΩ
128
95
90
V
O
Output Swing
R
L = 10kΩ to 2.5V
V
IN(diff) = ±0.5V
4.975
4.955
4.955
V
min
0.030
0.060
0.060
V
max
R
L = 2kΩ to 2.5V
V
IN(diff) = ±0.5V
4.936
V
0.075
V
I
O
Output Current
Sourcing, V
O =0V
V
IN(diff) = ±0.5V
5.9
4.1
1.5
mA
min
Sinking, V
O =5V
V
IN(diff) = ±0.5V
14.5
4.5
1.5
mA
min
I
S
Supply Current
0.75
1.0
1.2
mA
max
www.national.com
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