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PI6C2408

Zero Delay Clock Buffer

PS8589E

09/15/04

The relationship between loading of the FB_IN signal and other outputs determines the input-output delay. Zero delay is achieved when

all outputs, including feedback, are loaded equally.

Zero Delay and Skew Control

CLKINInputtoOutputBankDelayvs.DifferenceinLoadingbetweenFB_INpinandOUTA/OUTBpins

Maximum Ratings

Supply Voltage to Ground Potential ............................................................................................................................. –0.5Vto+7.0V

DC Input Voltage CLKIN ...................................................................................................................................................... –0.5 to 7V

Storage Temperature ................................................................................................................................................... –65ºCto+150ºC

Maximum Soldering Temperature (10 seconds) ........................................................................................................................... 260ºC

Junction Temperature .................................................................................................................................................................. 150ºC

Static Discharge Voltage (per MIL-STD-883, Method 3015) .................................................................................................... >2000V

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PinDescription

Output Load Difference: FB_IN Load - OUTA/OUTB Load (pF)

600

800

400

200

0

-200

-400

-600

-800

-900

-1000

-25

-20

-15

-10

-5

0

5

10

15

20

25

PI6C2408-1H

PI6C2408-1,2,3,4,6