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CAT64LC20LITE13 数据表(PDF) 2 Page - Catalyst Semiconductor |
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CAT64LC20LITE13 数据表(HTML) 2 Page - Catalyst Semiconductor |
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2 / 12 page ![]() Discontinued Parts 2 CAT64LC10/20/40 Doc. No. 1021, Rev. C ABSOLUTE MAXIMUM RATINGS* Temperature Under Bias ................. –55 °C to +125°C Storage Temperature ....................... –65 °C to +150°C Voltage on any Pin with Respect to Ground(1) ............ –2.0V to +VCC +2.0V VCC with Respect to Ground ............... –2.0V to +7.0V Package Power Dissipation Capability (Ta = 25 °C)................................... 1.0W Lead Soldering Temperature (10 secs) ............ 300 °C Output Short Circuit Current(2) ........................ 100 mA *COMMENT Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions outside of those listed in the operational sections of this specification is not implied. Exposure to any absolute maximum rating for extended periods may affect device performance and reliability. RELIABILITY CHARACTERISTICS Symbol Parameter Min. Max. UnitsReference Tes t Method NEND(3) Endurance 1,000,000 Cycles/Byte MIL-STD-883, Test Method 1033 TDR(3) Data Retention 100 Years MIL-STD-883, Test Method 1008 VZAP(3) ESD Susceptibility 2000 Volts MIL-STD-883, Test Method 3015 ILTH(3)(4) Latch-Up 100 mA JEDEC Standard 17 CAPACITANCE (TA = 25°C, f= 1.0 MHz, VCC =6.0V) Symbol Test Max. Units Conditions CI/O(3) Input/Output Capacitance (DO, RDY/ BSY)8 pF VI/O = 0V CIN(3) Input Capacitance ( CS, SK, DI, RESET) 6 pF VIN = 0V Note: (1) The minimum DC input voltage is –0.5V. During transitions, inputs may undershoot to –2.0V for periods of less than 20 ns. Maximum DC voltage on output pins is VCC +0.5V, which may overshoot to VCC +2.0V for periods of less than 20 ns. (2) Output shorted for no more than one second. No more than one output shorted at a time. (3) This parameter is tested initially and after a design or process change that affects the parameter. (4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1V to VCC +1V. |
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