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LM95010 数据表(PDF) 12 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor. Click here to check the latest version.
部件名 LM95010
功能描述  Digital Temperature Sensor with SensorPath??Bus in MSOP8 Package
PDF  19 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LM95010 数据表(HTML) 12 Page - National Semiconductor (TI)

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1.0 Functional Description (Continued)
1.
A bus error event occurred, and
2.
the "physical" condition for an Attention Request is met
(i.e., the bus is inactive), and
3.
At the first time 2. is met after 1 occurred, there has not
been a Bus Reset.
All devices (master or slave) must monitor the bus for an
Attention Request signal. The following notes clarify the
intended system operation that uses the Attention Request
Indication.
Masters are expected to use the attention request as a
trigger to read results from the LM95010. This is done in
a sequence that covers all LM95010s. This sequence is
referred to as "master sensor read sequence".
After an Attention Request is sent by an LM95010 until
after the next read from the Device Status register the
LM95010 does not send Attention Requests for a function
event since it is guaranteed that the master will read the
Status register as part of the master sensor read se-
quence. Note that the LM95010 will send an attention for
BER, regardless of the Status register read, to help the
master with any error recovery operations and prevent
deadlocks.
A master must record the Attention Request event. It
must then scan all slave devices in the system by reading
their Device Status register and must handle any pending
event in them before it may assume that there are no
more events to handle.
Note: there is no indication of which slave has sent the
request. The requirement that multiple requests are not sent
allows the master to know within one scan of register reads
that there are no more pending events.
1.3.6 Fixed Number Setting
The LM95010 device number is defined by strapping of the
ADD0 and ADD1 pins. The LM95010 will wake (after Device
Reset) with the Device Number field of the Device Number
register set to the address as designated in Section 1.1.1
Device Number. It is the responsibility of the system de-
signer to avoid having two devices with the same Device
Number on the bus.
Devices should be detected by the master by a read opera-
tion of the Device Number register. The read returns "000" if
there is no device at that address on the bus (the EP bit must
be ignored).
2.0 Register Set
2.1 REGISTER SET SUMMARY
Reg
Add
Register
Name
R/
W
P
O
R
Val
Bit
15
MSb
Bit
14
Bit
13
Bit
12
Bit
11
Bit
10
Bit
9
Bit
8
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
LSb
000 000
Device
Number
R
*
Not Available
Reserved
See Table 1
00000
000 001 Manufacturer
ID
R 100Bh
0001000000001011
000 010 Device ID
R
21h
RevID
Device ID
0000000000100001
000 011 Capabilities
Fixed
R
1h
Reserved
Function 1
0000000000000001
000 100 Device
Status
R
0h
Not Available
BER
0
0 ERF1
0
0
0
SF1
000 101 Device
Control
R/
W
0h
Reserved
EnF1 Res Low
Pwr
Shut
down
Reset
00000000000
0
001 000 Temperature
Capabilities
R 014Ah
Reserved
Int
Sens
Rout
Size
Sign
10Bits
0.25˚C
Resolution
0000000101001010
001 001 Temperature
Data
Readout
R
MSb
Sign
64˚C 32˚C 16˚C 8˚C
4˚C
2˚C
1˚C
0.5
˚C
LSb
0.25
˚C
Reserved
000000
001 010 Temperature
Control
R/
W
0h
Reserved
EN0 ATE
00000000000000
001 011
-011 111
Reserved
R
Undefined
100 000 Conversion
Rate
R/
W
2h
Not Available
000000
Conversion
Rate
100 001
- 111 111
Undefined
Registers
R
Undefined
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