CDC208

DUAL 1-LINE TO 4-LINE CLOCK DRIVER

WITH 3-STATE OUTPUTS

SCAS109F – APRIL 1990 – REVISED OCTOBER 1998

2

POST OFFICE BOX 655303

X/Y

19

1A

1

18

2

17

1Y1

20

1Y2

1

1Y3

2

1Y4

3

1

1

2

3

G5

EN

2Y1

8

2Y2

9

2Y3

10

2Y4

11

13

12

14

2A

4, 5

1OE1

1OE2

2OE1

2OE2

4, 5

4, 5

4, 5

V4

† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.

logic diagram (positive logic)

1Y1

20

1OE1

18

1OE2

17

1A

19

1Y2

1

1Y3

2

1Y4

3

2Y1

8

2OE1

13

2OE2

12

2A

14

2Y2

9

2Y3

10

2Y4

11