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ACT30AYT 数据表(PDF) 4 Page - Active-Semi, Inc |
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ACT30AYT 数据表(HTML) 4 Page - Active-Semi, Inc |
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4 / 10 page ![]() ACT30 Rev 5, 05-Jun-09 Active-Semi Innovative Power TM - 4 - www.active-semi.com Copyright © 2009 Active-Semi, Inc. ActiveSwitcher TM is a trademark of Active-Semi. FUNCTIONAL BLOCK DIAGRAM VDD REGULATOR GND FREQ1 DRV2 2 BIAS & UVLO OSC & RAMP CURRENT PFWM SWITCHING CONTROL LOGIC SLEW GND DRV1 HICCUP CONTROL + 9k 200k 4.75V 10µA/V ILIM VC GENERATOR ERROR COMP 20k 20k 40 1X 56X 56X 3.6V (ACT30A/C) 4.6V (ACT30B/D) FUNCTIONAL DESCRIPTION As seen in the Functional Block Diagram, the main components include switching control logic, two on- chip medium-voltage power-MOSFETs with parallel current sensor, driver, oscillator and ramp generator, current limit VC generator, error comparator, hiccup control, bias and under voltage- lockout, and regulator circuitry. As seen in the Functional Block Diagram, the design has six internal terminals. VVDD is the power supply terminal. DRV1 and DRV2 are linear driver outputs that can drive the emitter of an external high voltage NPN transistor or N-channel MOSFET. This emitter-drive method takes advantage of the high VCBO of the transistor, allowing a low cost transistor such as ‘13003 (VCBO = 700V) or ‘13002 (VCBO = 600V) to be used for a wide AC input range. The slew-rate limited driver coupled with the turn-off characteristics of an external NPN transitor result in lower EMI. The driver peak current is designed to have a negative voltage coefficient with respect to supply voltage VVDD, so that lower supply voltage automatically results in higher DRV1 peak current. This way, the optocoupler can control VVDD directly to affect driver current. Startup Sequence Figure 1 shows a Simplified Application Circuit for the ACT30. Initially, the small current through resistor R1 charges up the capacitor C1, and the BJT acts as a follower to bring up the DRV1 voltage. An internal regulator generates a VVDD voltage equal to VDRV1 – 3.6V for ACT30A (VDRV1 – 4.6V for ACT30B) but limits it to 5.5V max. As VVDD crosses 5V, the regulator sourcing function stops and VVDD begins to drop due to its current consumption. As VVDD voltage decreases below 4.75V, the IC starts to operate with increasing driver current. When the output voltage reaches regulation point, the optocoupler feedback circuit stops VVDD from decreasing further. The switching action also allows the auxiliary windings to take over in supplying the C1 capacitor. Figure 2 shows a typical startup sequence for the ACT30. To limit the auxiliary voltage, use a 12V zener diode for ACT30A or a 13V zener diode for ACT30B (D1 diode in Figure 1). Even though up to 2MΩ startup resistor (R1) can be used due to the very low startup current, the actual R1 value should be chosen as a compromise between standby power and startup time delay. : FREQ terminal wire-bonded to VDD in ACT30C/D (TO-92) : DRV2 terminal wire-bonded to DRV1 in ACT30B/D (TO-92) |
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