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LMC66 数据表(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LMC66
功能描述  Low Voltage, Rail-To-Rail Input and Output CMOS
PDF  24 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LMC66 数据表(HTML) 3 Page - National Semiconductor (TI)

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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
ESD Tolerance (Note 2)
2 kV
Differential Input Voltage
±Supply Voltage
Voltage at Input/Output Pin
(V
+) +0.3V, (V−) −0.3V
Supply Voltage (V
+ − V−)
12V
Current at Input Pin (Note 11)
±5mA
Current at Output Pin (Note 3)
±30 mA
Current at Power Supply Pin
35 mA
Lead Temp. (soldering, 10 sec.)
260˚C
Storage Temperature Range
−65˚C to +150˚C
Junction Temperature (Note 4)
150˚C
Operating Ratings (Note 1)
Supply Voltage
1.8V
≤ V
S ≤ 10V
Junction Temperature Range
LMC6681AI, LMC6681BI
−40˚C
≤ T
J ≤ +85˚C
LMC6682AI, LMC6682BI
−40˚C
≤ T
J ≤ +85˚C
LMC6684AI, LMC6684BI
−40˚C
≤ T
J ≤ +85˚C
Thermal Resistance (
θ
JA)
N Package, 8-pin Molded DIP
108˚C/W
M Package, 8-pin Surface Mount
172˚C/W
N Package, 14-pin Molded DIP
88˚C/W
M Package, 14-pin Surface Mount
126˚C/W
N Package, 16-pin Molded DIP
83˚C/W
M Package, 16-pin Surface Mount
114˚C/W
3V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for T
J = 25˚C, V
+ = 3.0V, V− = 0V, V
CM = VO = V
+/2, V
PD = 0.6V and RL >
1M
Ω. Boldface limits apply at the temperature extremes (Note 16).
Symbol
Parameter
Conditions
Typ
(Note 5)
LMC6681AI
LMC6681BI
Units
LMC6682AI
LMC6682BI
LMC6684AI
LMC6684BI
Limit
Limit
(Note 6)
(Note 6)
V
OS
Input Offset Voltage
0.5
1
3
mV
2.5
4.5
max
TCV
OS
Input Offset Voltage
1.5
µV/˚C
Average Drift
I
B
Input Current
(Note 12)
0.08
20
20
pA max
I
OS
Input Offset Current
(Note 12)
0.04
10
10
pA max
R
IN
Input Resistance
>1
Tera
Ω
C
IN
Input Capacitance
3
pF
CMRR
Common Mode
(Note 13)
82
70
65
dB
Rejection Ratio
65
62
min
PSRR
Power Supply
±1.5V
≤ V
S ≤ ±2.5V
82
70
65
dB
Rejection Ratio
V
O = V
+/2 = V
CM
65
62
min
V
CM
Input Common Mode
CMRR > 50 dB
3.23
3.18
3.18
V
Voltage Range
3.00
3.00
min
−0.3
−0.18
−0.18
V
0.00
0.00
max
A
V
Large Signal
Voltage Gain
R
L = 600Ω (Notes 7, 12)
70
10
10
V/mV
R
L = 10 kΩ (Notes 7, 12)
1000
12
12
V/mV
V
O
Output Swing
R
L = 600Ω to V
+/2
2.87
2.70
2.70
V
2.58
2.58
min
0.15
0.3
0.3
V
0.42
0.42
max
R
L = 2kΩ to V
+/2
2.95
2.85
2.85
V
2.79
2.79
min
0.05
0.15
0.15
V
0.21
0.21
max
R
L = 10 kΩ to V
+/2
2.99
2.94
2.94
V
2.91
2.91
min
0.01
0.04
0.04
V
0.05
0.05
max
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