CS7808 datasheet(41/52 Pages) CIRRUS

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CS7808

6.3

SDRAM Interface

These pins are used to interface the CS7808 with some external SDRAM. The CS7808 can interface with

SDRAM of various sizes. Both 16 and 32-bit data width is supported, but best performance is achieved

with 32 bits. Follow the instructions in Table 18 on how to interface with any particular configuration of

SDRAM.

Signal Name

Type

Description

87, 83, 79, 76,

74, 71, 68, 64,

67, 70, 72, 75,

78, 80, 86, 88,

60, 56, 54, 49,

46, 44, 40, 33,

37, 42, 45, 48,

51, 55, 59. 62

M_D[31..0]

Memory Data Bus. CS7808 can use all 32 bits or can use only

M_D[15..0], in which case M_D[31..16] can be left un-con-

nected.

2, 3, 5, 6, 7, 9,

10, 11, 13, 14,

15, 16

M_A[11..0]

Memory Address Bus. Connect in order starting with M_A[0] to

all RAM address pins not already connected to M_BS_L or

M_AP. Unused upper M_A pins unconnected.

M_CKO

Memory Clock

M_CKE

Memory Clock Enable

M_BS_N

Bank Selection. Always connect to RAM BS or BS0 pin.

M_AP

Memory Auto Pre-charge. Always connect to RAM AP pin.

M_RAS_N

Memory Row Address Strobe

M_CAS_N

Memory Column Address Strobe

M_WE_N

Memory Write Enable

32, 31, 29, 28

M_DQM[3..0]

IO Mask of Data Bus M_DQM[3] -> M_D[31:24]

Table 18. SDRAM Interface

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