LP2954IS datasheet(8/13 Pages) NSC

8 / 13 page

Application Hints (Continued)

The next parameter which must be calculated is the maxi-

mum allowable temperature rise, T

R(max). This is calculated

by using the formula:

R(max) = TJ(max) − TA(max)

where: T

J(max) is the maximum allowable junction

temperature

A(max) is the maximum ambient temperature

Using the calculated values for T

R(max) and P(max), the re-

quired value for junction-to-ambient thermal resistance,

(J-A), can now be found:

(J-A) = TR(max)/P(max)

If the calculated value is 60˚ C/W or higher , the regulator

may be operated without an external heatsink. If the calcu-

lated value is below 60˚ C/W, an external heatsink is re-

quired. The required thermal resistance for this heatsink can

be calculated using the formula:

(H-A) = θ(J-A) − θ(J-C) − θ(C-H)

where:

(J-C) is the junction-to-case thermal resistance, which is

specified as 3˚ C/W maximum for the LP2954.

(C-H) is the case-to-heatsink thermal resistance, which is

dependent on the interfacing material (if used). For details

and typical values, refer to (Note 2) listed at the end of the

ELECTRICAL CHARACTERISTICS section.

(H-A) is the heatsink-to-ambient thermal resistance. It is this

specification (listed on the heatsink manufacturers data

sheet) which defines the effectiveness of the heatsink. The

heatsink selected must have a thermal resistance which is

equal to or lower than the value of

(H-A) calculated from the

above listed formula.

PROGRAMMING THE OUTPUT VOLTAGE

The regulator may be pin-strapped for 5V operation using its

internal resistive divider by tying the Output and Sense pins

together and also tying the Feedback and 5V Tap pins to-

gether.

Alternatively, it may be programmed for any voltage between

the 1.23V reference and the 30V maximum rating using an

external pair of resistors (see

Figure 2). The complete equa-

tion for the output voltage is:

where V

REF is the 1.23V reference and IFB is the Feedback

pin bias current (−20 nA typical). The minimum recom-

mended load current of 1 µA sets an upper limit of 1.2 M

Ω on

the value of R2 in cases where the regulator must work with

no load (see MINIMUM LOAD ). I

FB will produce a typical 2%

error in V

OUT which can be eliminated at room temperature

by trimming R1. For better accuracy, choosing R2 = 100 k

Ω

will reduce this error to 0.17% while increasing the resistor

program current to 12 µA. Since the typical quiescent current

is 120 µA, this added current is negligible.

DROPOUT DETECTION COMPARATOR

This comparator produces a logic “LOW” whenever the out-

put falls out of regulation by more than about 5%. This figure

results from the comparator’s built-in offset of 60 mV divided

by the 1.23V reference (refer to block diagrams on page 1).

The 5% low trip level remains constant regardless of the pro-

grammed output voltage. An out-of-regulation condition can

result from low input voltage, current limiting, or thermal lim-

iting.

Figure 3 gives a timing diagram showing the relationship be-

tween the output voltage, the ERROR output, and input volt-

age as the input voltage is ramped up and down to a regula-

tor programmed for 5V output. The ERROR signal becomes

low at about 1.3V input. It goes high at about 5V input, where

the output equals 4.75V. Since the dropout voltage is load

dependent, the input voltage trip points will vary with load

current. The output voltage trip point does not vary.

The comparator has an open-collector output which requires

an external pull-up resistor. This resistor may be connected

to the regulator output or some other supply voltage. Using

the regulator output prevents an invalid “HIGH” on the com-

parator output which occurs if it is pulled up to an external

voltage while the regulator input voltage is reduced below

1.3V. In selecting a value for the pull-up resistor, note that

while the output can sink 400 µA, this current adds to battery

drain. Suggested values range from 100 k

Ω to 1 MΩ. This

resistor is not required if the output is unused.

When V

IN ≤ 1.3V, the error flag pin becomes a high imped-

ance, allowing the error flag voltage to rise to its pull-up volt-

age. Using V

OUT as the pull-up voltage (rather than an exter-

nal 5V source) will keep the error flag voltage below 1.2V

(typical) in this condition. The user may wish to divide down

the error flag voltage using equal-value resistors (10 k

Ω sug-

gested) to ensure a low-level logic signal during any fault

condition, while still allowing a valid high logic level during

normal operation.

DS011128-5

*See External Capacitors

PTotal = (VIN −5) IL+(VIN)IG

FIGURE 1. Basic 5V Regulator Circuit

DS011128-36

* See Application Hints

** Drive with TTL-low to shut down

FIGURE 2. Adjustable Regulator

LP2954IS 数据表(PDF) 8 Page - National Semiconductor (TI)

LP2954IS 数据表(HTML) 8 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13

数据表下载