LP3961/LP3964

800mA Fast Ultra Low Dropout Linear Regulators

General Description

The LP3961/LP3964 series of fast ultra low-dropout linear

regulators operate from a +2.5V to +7.0V input supply. Wide

range of preset output voltage options are available. These

ultra low dropout linear regulators respond very fast to step

changes in load which makes them suitable for low voltage

microprocessor applications. The LP3961/LP3964 are de-

veloped on a CMOS process which allows low quiescent

current operation independent of output load current. This

CMOS process also allows the LP3961/LP3964 to operate

under extremely low dropout conditions.

Dropout Voltage: Ultra low dropout voltage; typically 24mV

at 80mA load current and 240mV at 800mA load current.

Ground Pin Current: Typically 4mA at 800mA load current.

Shutdown Mode: Typically 15µA quiescent current when

the shutdown pin is pulled low.

Error Flag: Error flag goes low when the output voltage

drops 10% below nominal value (for LP3961).

SENSE: Sense pin improves regulation at remote loads.

(For LP3964)

Precision Output Voltage: Multiple output voltage options

are available ranging from 1.2V to 5.0V and adjustable, with

ture).

Features

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Ultra low dropout voltage

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Low ground pin current

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Load regulation of 0.02%

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15µA quiescent current in shutdown mode

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Guaranteed output current of 0.8A DC

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Available in SOT-223,TO-263 and TO-220 packages

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Error flag indicates output status (LP3961)

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Sense option improves better load regulation (LP3964)

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Extremely low output capacitor requirements

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Overtemperature/overcurrent protection

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−40˚C to +125˚C junction temperature range

Applications

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Microprocessor power supplies

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GTL, GTL+, BTL, and SSTL bus terminators

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Power supplies for DSPs

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SCSI terminator

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Post regulators

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High efficiency linear regulators

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Battery chargers

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Other battery powered applications

Typical Application Circuits

DS101129-1

# Minimum output capacitance is 10 µF to ensure stability over full load current range. More capacitance provides superior dynamic performance and additional

stability margin.

*SD and ERROR pins must be pulled high through a 10k

Ω pull-up resistor. Connect the ERROR pin to ground if this function is not used. See applications sec-

tion for more information.

May 2000

© 2000 National Semiconductor Corporation

DS101129

www.national.com