Shutdown Operation

A CMOS Logic level signal at the shutdown ( SD) pin will

turn-off the regulator. Pin SD must be actively terminated

through a 10k

Ω pull-up resistor for a proper operation. If this

pin is driven from a source that actively pulls high and low

(such as a CMOS rail to rail comparator), the pull-up resistor

is not required. This pin must be tied to Vin if not used.

Dropout Voltage

The dropout voltage of a regulator is defined as the minimum

input-to-output differential required to stay within 2% of the

output voltage. The LP3963/LP3966 use an internal MOS-

FET with an Rds(on) of 240m

Ω (typically). For CMOS LDOs,

the dropout voltage is the product of the load current and the

Rds(on) of the internal MOSFET.

Reverse Current Path

The internal MOSFET in LP3963and LP3966 has an inher-

ent parasitic diode. During normal operation, the input volt-

age is higher than the output voltage and the parasitic diode

is reverse biased. However, if the output is pulled above the

input in an application, then current flows from the output to

the input as the parasitic diode gets forward biased. The out-

put can be pulled above the input as long as the current in

the parasitic diode is limited to 200mA continuous and 1A

peak.

Maximum Output Current Capability

LP3963 and LP3966 can deliver a continuous current of 3A

over the full operating temperature range. A heatsink may be

required depending on the maximum power dissipation and

maximum ambient temperature of the application. Under all

possible conditions, the junction temperature must be within

the range specified under operating conditions. The total

power dissipation of the device is given by:

P

where I

(specified under Electrical Characteristics).

The maximum allowable temperature rise (T

on the maximum ambient temperature (T

cation, and the maximum allowable junction temperature(T

J-

max

):

T

The maximum allowable value for junction to ambient Ther-

mal Resistance,

θ

θ

LP3963 and LP3966 are available in TO-220 and TO-263

packages. The thermal resistance depends on amount of

copper area or heat sink, and on air flow. If the maximum al-

lowable value of

θ

220 package and

≥ 60 ˚C/W for TO-263 package no heatsink

is needed since the package can dissipate enough heat to

satisfy these requirements. If the value for allowable

θ

below these limits, a heat sink is required.

Heatsinking TO-220 Package

The thermal resistance of a TO220 package can be reduced

by attaching it to a heat sink or a copper plane on a PC

board. If a copper plane is to be used, the values of

θ

be same as shown in next section for TO263 package.

The heatsink to be used in the application should have a

heatsink to ambient thermal resistance,

θ

In this equation,

θ

tion to the surface of the heat sink and

θ

sistance from the junction to the surface of the case.

θ

about 3˚C/W for a TO220 package. The value for

θ

pends on method of attachment, insulator, etc.

θ

between 1.5˚C/W to 2.5˚C/W. If the exact value is unknown,

2˚C/W can be assumed.

Heatsinking TO-263 Package

The TO-263 package uses the copper plane on the PCB as

a heatsink. The tab of these packages are soldered to the

copper plane for heat sinking.

Figure 3 shows a curve for the

θ

a typical PCB with 1 ounce copper and no solder mask over

the copper area for heat sinking.

As shown in the figure, increasing the copper area beyond 1

square inch produces very little improvement. The minimum

value for

θ

32˚C/W.

Figure 4 shows the maximum allowable power dissipation

for TO-263 packages for different ambient temperatures, as-

suming

θ

ture is 125˚C.

DS101267-32

FIGURE 3.

θ

package

DS101267-33

FIGURE 4. Maximum power dissipation vs ambient

temperature for TO-263 package

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