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LP3981 数据表(PDF) 8 Page - National Semiconductor (TI) |
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LP3981 数据表(HTML) 8 Page - National Semiconductor (TI) |
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8 / 11 page ![]() Typical Performance Characteristics Unless otherwise specified, C IN =COUT = 2.2 µF Ceramic, CBP = 0.033 µF, VIN =VOUT + 0.5V, TA = 25˚C, Enable pin is tied to VIN. (Continued) Line Transient Response (V IN =VOUT +1VtoVOUT + 1.6V) Line Transient Response (V IN =VOUT +1VtoVOUT + 1.6V) 20020326 20020327 Line Transient Response (V IN =VOUT +1VtoVOUT + 1.6V) Line Transient Response (V IN =VOUT +1VtoVOUT + 1.6V) 20020328 20020329 Enable Response (T ON) Enable Response (T ON) 20020330 20020331 Application Hints POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus, the power dissipation is dependant on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air. As stated in notes 3 and 5 in the electrical specifications sections, the allowable power dissipation for the device in a given package can be calculated using the equation: With a θ JA = 50˚C/W, the device in theLLP package returns a value of 2.0W with a maximum junction temperature of www.national.com 8 |
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