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AT89C51CC03U-RDTIM 数据表(PDF) 91 Page - ATMEL Corporation |
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AT89C51CC03U-RDTIM 数据表(HTML) 91 Page - ATMEL Corporation |
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91 / 195 page ![]() 91 AT89C51CC03 4182I–CAN–06/05 Figure 47. CAN Controller Block Diagram CAN Controller Mailbox and Registers Organization The pagination allows management of the 321 registers including 300(15x20) Bytes of mailbox via 34 SFR’s. All actions on the message object window SFRs apply to the corresponding message object registers pointed by the message object number find in the Page message object register (CANPAGE) as illustrate in Figure 48. Bit Stuffing /Destuffing Cyclic Redundancy Check Receive Transmit Error Counter Rec/Tec Bit Timing Logic Page Register DPR(Mailbox + Registers) Priority Encoder µC-Core Interface Core Control Interface Bus TxDC RxDC |
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