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COP425C 数据表(PDF) 13 Page - National Semiconductor (TI) |
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COP425C 数据表(HTML) 13 Page - National Semiconductor (TI) |
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13 / 24 page ![]() Instruction Set Table II is a symbol table providing internal architecture in- struction operan and operation symbols used in the instruc- tion set table TABLE II Instruction Set Table Symbols Symbol Definition Internal Architecture Symbols A 4-bit accumulator B 7-bit RAM address register (6-bit for COP424C) Br Upper 3 bits of B (register address) (2-bit for COP424C) Bd Lower 4 bits of B (digit address) C 1-bit carry register D 4-bit data output port EN 4-bit enable register G 4-bit general purpose IO port IL two 1-bit (IN0 and IN3) latches IN 4-bit input port L 8-bit TRI-STATE IO port M 4-bit contents of RAM addressed by B PC 11-bit ROM address program counter Q 8-bit latch for L port SASBSC 11-bit 3-level subroutine stack SIO 4-bit shift register and counter SK Logic-controlled clock output SKL 1-bit latch for SK output T 8-bit timer Table III provides the mnemonic operand machine code data flow skip conditions and description of each instruc- tion Instruction Operand Symbols d 4-bit operand field 0 – 15 binary (RAM digit select) r 3(2)-bit operand field 0 – 7(3) binary (RAM register select) a 11-bit operand field 0 – 2047 (1023) y 4-bit operand field 0 – 15 (immediate data) RAM(x) RAM addressed by variable x ROM(x) ROM addressed by variable x Operational Symbols a Plus b Minus x Replaces Is exchanged with e Is equal to A One’s complement of A Z Exclusive-or Range of values TABLE III COP444C445C Instruction Set Machine Mnemonic Operand Hex Language Data Flow Skip Description Code Code Conditions (Binary) ARITHMETIC INSTRUCTIONS ASC 30 0011 0000 AaCaRAM(B) xA Carry Add with Carry Skip on Carry xC Carry ADD 31 0011 0001 AaRAM(B) xA None Add RAM to A ADT 4A 0100 1010 Aa1010 xA None Add Ten to A AISC y 5b 0101 y Aay xA Carry Add Immediate Skip on Carry (y i 0) CASC 10 0001 0000 AaRAM(B)aC xA Carry Complement and Add with Carry xC Carry Skip on Carry CLRA 00 0000 0000 0 xA None Clear A COMP 40 0100 0000 A xA None Ones complement of A to A NOP 44 0100 0100 None None No Operation RC 32 0011 0010 ‘‘0’’ xC None Reset C SC 22 0010 0010 ‘‘1’’ xC None Set C XOR 02 0000 0010 A Z RAM(B) xA None Exclusive-OR RAM with A 13 |
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