Main characteristics and circuit description

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Main characteristics and circuit description

The main characteristics of the SMPS are listed here below:

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Universal input mains range: 90 - 264 Vac, 45

−65 Hz

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Output voltages: 19 V @ 4 A continuous operation

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Mains harmonics: in accordance with EN61000-3-2 class-D

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Standby mains consumption: less than 0.3 W @ 265 Vac

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Overall efficiency: greater than 85%

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EMI: in accordance with EN55022-class B

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Safety: in accordance with EN60950

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PCB single layer: single side, 70 µm, CEM-1, 78 x 174 mm, mixed PTH/SMT

The circuit is made up of two stages: a front-end PFC using the L6563 and a flyback

converter based on the L6668. The electrical schematic is shown in Figure 2.

The flyback stage works as the master stage and therefore is dedicated to controlling circuit

operation, including standby and protection functions. Additionally, it switches the PFC stage

on and off the by means of a dedicated pin on the control IC, thus helping to achieve good

efficiency even at light load. The input EMI filter is a classic Pi-filter, 1-cell for differential and

common mode noise. An NTC in series with the PFC output capacitor limits the inrush

current produced by the charging of the capacitor at plug-in.

The purpose of the PFC stage is to reduce the harmonic content of the input current to be

within the limits imposed by European norm EN61000-3-2. Additionally, it provides a

regulated dc bus used by the downstream converter.

The PFC controller is the L6563 (U1), working in transition mode. It integrates all functions

needed to control the PFC as well as an interface to the master converter. Its power stage

topology is a conventional boost converter, connected to the output of the rectifier bridge. It

includes the coil L2, the diode D3, the capacitor C6 and the power switch Q2, a power

MOSFET.

The secondary winding of L2 (pins 8-3) provides the L6563 with information about the core

demagnetization of the PFC coil, needed by the controller for TM (transition mode)

operation. The divider R7, R12 and R18 provides the L6563 with the instantaneous input

voltage information that is used to modulate the boost current, and to derive additional

forward) function. The divider R2, R6, R8, R9 is dedicated to sensing the output voltage and

feeds the information to the error amplifier, while the divider R3, R5, R11, R19, directly

connected to the output voltage, is dedicated to protecting the circuit in case of voltage loop

failure. To maximize overall efficiency, the PFC makes use of the so-called "tracking boost

option" (TBO). With this function implemented the dc output voltage of the PFC changes

proportionally with the mains voltage. The L6563 achieves this functionality by adding a

resistor (R30) connected to the dedicated TBO pin (#6).

activated by the PFC-STOP pin of the L6668. The PFC-STOP pin is intended to stop the

PFC controller at light load by cutting its supply. This happens when the COMP pin on the

L6668 controller goes below 2.2V.

The downstream converter, acting as the master stage, is managed by the L6668 IC (U2), a

current mode controller. The 65 kHz nominal switching frequency has been chosen to