DocID027006 Rev 1

3/8

EVLPOWERSTEP01

Board description

8

Table 2. Jumpers and connectors description

Name

Type

Function

J4

Power supply

Main supply voltage

J1

Power output

Power bridge A outputs

J3

Power output

Power bridge B outputs

J6

Power supply

Integrated voltage regulator inputs

J5

SPI

Master SPI connector

J7

SPI

Slave SPI connector

JP3

Jumper

VS to VSREG jumper

JP4

Jumper

VSREG to VCC jumper

JP5

Jumper

VCC to VCCREG jumper

JP6

Jumper

VCCREG to VREG jumper

JP7

Jumper

VREG to VDD jumper

JP8

Jumper

VDD to 3.3 V from SPI connector jumper

JP9

Jumper

Daisy chain termination jumper

JP10

Jumper

STBY to VS pull-up jumper

Table 3. Master SPI connector pinout (J5)

Pin number

Type

Function

1

Open drain output

powerSTEP01 BUSY output

2

Open drain output

powerSTEP01 FLAG output

3

Ground

Ground

4

Supply

EXT_VDD (can be used as external logic power supply)

5

Digital output

SPI “Master In Slave Out” signal (connected to powerSTEP01 SDO output

through daisy chain termination jumper JP9)

6

Digital input

SPI “Serial Clock” signal (connected to powerSTEP01 CK input)

7

Digital input

SPI “Master Out Slave In” signal (connected to powerSTEP01 SDI input)

8

Digital input

SPI “Slave Select” signal (connected to powerSTEP01 CS input)

9

Digital input

powerSTEP01 step-clock input

10

Digital input

powerSTEP01 standby/reset input