TLF6415

June 1989

DM54LS251DM74LS251

TRI-STATE

Data SelectorsMultiplexers

General Description

These data selectorsmultiplexers contain full on-chip bina-

ry decoding to select one-of-eight data sources and feature

a strobe-controlled TRI-STATE output The strobe must be

at a low logic level to enable these devices The TRI-STATE

outputs permit direct connection to a common bus When

the strobe input is high both outputs are in a high-imped-

ance state in which both the upper and lower transistors of

each totem-pole output are off and the output neither drives

nor loads the bus significantly When the strobe is low the

outputs are activated and operate as standard TTL totem-

pole outputs

To minimize the possibility that two outputs will attempt to

take a common bus to opposite logic levels the output con-

trol circuitry is designed so that the average output disable

time is shorter than the average output enable time

Features

Y

TRI-STATE version of LS151

Y

Interface directly with system bus

Y

Perform parallel-to-serial conversion

Y

Permit multiplexing from N-lines to one line

Y

Complementary outputs provide true and inverted data

Y

Maximum number of common outputs

54LS

49

74LS

129

Y

Typical propagation delay time (D to Y)

54LS

17 ns

74LS

17 ns

Y

Typical power dissipation

54LS

35 mW

74LS

35 mW

Connection Diagram

Dual-In-Line Package

TLF6415 – 1

Order Number DM54LS251J DM54LS251W

DM74LS251M or DM74LS251N

See NS Package Number J16A M16A N16E or W16A

Function Table

Inputs

Outputs

Select

Strobe

YW

CBA

S

XXX

H

Z

Z

L

L

L

L

D0

D0

L

L

H

L

D1

D1

L

H

L

L

D2

D2

L

H

H

L

D3

D3

H

L

L

L

D4

D4

H

L

H

L

D5

D5

H

H

L

L

D6

D6

H

H

H

L

D7

D7

D0 D1

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A