Digital pulse compression module

CI F07 Dual Expander

October 15

CI F07 Dual Expander Revision A1

6 / 6

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Interfaces description

6.

Interfaces description

Line

Pin number

Name

Description

J1 to J3 : SMA – Jack

6.1

J1

CLK_IN

Reference clock input

AC, 50 Ω

6.2

J2

RFB_OUT

Expander channel B RF chirp output

AC, 50 Ω

6.3

J3

RFA_OUT

Expander channel A RF chirp output

AC, 50 Ω

FL01 to FL04 : By-pass filter

6.4

FL01

Power supply return

Power supply return

6.5

FL02

Power supply

Power supply

6.6

FL03

Pi filter

Not used

6.7

FL04

Pi filter

Not used

P1 : MIL-C-24308 15-pin SubD Connector

6.8

P1 – 4 /

P1 – 12

WFMSELA_IN +/-

Expander A Waveform selection input

RS-422 compatible input, 120 Ω differential impedance

6.9

P1 – 6 /

P1 – 14

WFMSELB_IN +/-

Expander B Waveform selection input

RS-422 compatible input, 120 Ω differential impedance

6.10

P1 – 2 /

P1 – 10

TRIGA_IN +/-

Trigger A input

Time reference = First clock rising edge following Trigger

low to high transition.

RS-422 compatible input, 120 Ω differential impedance

6.11

P1 – 3 /

P1 – 11

TRIGB_IN +/-

Trigger B input

Time reference = First clock rising edge following Trigger

low to high transition.

RS-422 compatible input, 120 Ω differential impedance

6.12

P1 – 5 /

P1 – 13

UNIT_OK_OUT +/-

BITE output

RS-422 level, Logic 1 = Unit OK

Indicates the GO-NOGO state of the unit

6.13

P1 – 8

GND

Ground

6.14

P1 – 15

UNIT_OK_OCOUT

Open Collector BITE Output

TTL Level with 300 Ω internal pull-up, Logic 1 = Unit OK

Indicates the GO-NOGO state of the unit

May be tied to other UNIT_OK_OCOUT to generate a global

System OK when 2 or more CI F07 units are used

P3 : MOLEX type 87833-1420

6.15

P3

JTAG

JTAG interface for program download