Application information

HVLED001

18/27

DocID027333 Rev 1

7.2.1

Current sense input

The peak of the primary current is read across a shunt resistor placed between the

MOSFET's source and compared with a threshold equal to:

Equation 1

Where the term VHVSU,pk is the maximum value of the HVSU voltage within around 20 ms

and is used to compensate the dependency on the input voltage of the open loop gain

and CS threshold.

A leading edge blanking time (LEB) is applied after MOSFET's turn on.

The Vcs signal is upper limited to a value that depends on the CTRL voltage and is lower

limited to a level defined as:

Equation 2

A second level OCP threshold is present to temporarily stop the switching activity in case of

inductor saturation.

7.2.2

Feedback input

The FB pin is intended to be connected directly to the collector of the optocoupler that

provides the galvanic insulation to the control loop as well as to act as compensation output

for the primary side control (PSR) loop of the output voltage (see Section 7.2.4). A suitable

RC network can be placed between FB and ground to compensate the control loop.

In case of constant output voltage applications, the PSR loop can be used to regulate the

output voltage saving the secondary side error amplifier.

The FB voltage is also used as an input parameter for the burst-mode operation described

in Section 7.2.5.

The pin embeds protection to prevent from the operation with the failed optocoupler and can

be pulled to ground to interrupt the switching activity (stop mode).

7.2.3

Zero current detection

The zero level detection is performed by a trigger logic that, once armed by a rising voltage,

is sensitive to falling edges. The advanced ZCD logic is able to discriminate between the

normal operation, output short-circuit or start-up condition.

An internal blanking time prevents any triggering signal to activate the MOSFET's at the

very beginning of the off time, where spurious resonances could be present. As a result, the

first falling edge occurring after the blanking time turns on the MOSFET.

To ensure a proper operation, the transformer has to be designed to guarantee that the

inductor's demagnetization time is longer than TBLANK (at VTOFF > VTOFF,fix) when the

VCS kp

VHVSU

VHVSU pk



-------------------------------



VFB VFB ref



–





+