Data Sheet

ADL5910

Rev. 0 | Page 17 of 22

RESET ON ENABLE OR AT POWER-UP

The ADL5910 normally powers up with the Q and Q outputs high

and low, respectively. If a logic low on the Q output is required

on power-up or enable, use the circuit shown in Figure 19. This

circuit consists of a capacitor from ENBL to RST and a resistor

from RST to ground. When ENBL is asserted, the RST voltage

goes high shortly before being pulled back to 0 V by R5.

When the ENBL pin is not used (that is, ENBL is tied to VPOS),

tie the C3 capacitor directly to VPOS.

IMPROVING FREQUENCY FLATNESS

For applications where input protection is required over a wide

range of input frequencies, use the application circuit shown in

Figure 20 to compensate for the frequency roll-off of the

ADL5910 detector.

Across its full range, the frequency response of ADL5910 varies

by approximately 9 dB with most of the variation between 2 GHz

and 6 GHz. As a result, higher power levels are required at higher

frequencies to trip the internal comparator (assuming a constant

threshold voltage on the VIN− input pin to the comparator). To

compensate for this roll-off, insert a preemphasis filter in front

of the RF input. The attenuation of this filter decreases with

increasing frequency, resulting in an overall flatter response in

the combined filter/detector circuit.

RFIN

C11

100pF

C12

0.1µF

C3

100nF

R5

10kΩ

DECL

VCAL

Q

Q

ADL5910

RST

ENBL

VIN–

1

3

4

14

15

16

2

6

8

9

5

7

10

11

12

13

Q

Q

YEL

ENBL

3.3V

RFIN

AGND

AGND

C2

0.1µF

R6

82.5Ω

Figure 19. Reset of Q Output on Power-Up/Enable (Additional Connections Omitted for Clarity)

RFIN

DECL

VCAL

Q

Q

ADL5910

RST

ENBL

VIN–

1

3

4

14

15

16

2

6

8

9

5

7

10

11

12

13

R6

68.1Ω

R13

68.1Ω

R11

68.1Ω

L2

2.2nH

L1

2.2nH

AGND

AGND

AGND

AGND

R10

82.5Ω

R14

49.9Ω

C2

0.1µF

C5

15pF

R12

121Ω

C4

0.8pF

RFIN_EXT

Figure 20. Recommended Schematic for Improving Flatness vs. Frequency Using a Preemphasis Circuit