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LP2994MX 数据表(PDF) 3 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
部件名 LP2994MX
功能描述  DDR Termination Regulator
PDF  15 Pages
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制造商  NSC [National Semiconductor (TI)]
网页  http://www.national.com
标志 NSC - National Semiconductor (TI)

LP2994MX 数据表(HTML) 3 Page - National Semiconductor (TI)

  LP2994MX Datasheet HTML 1Page - National Semiconductor (TI) LP2994MX Datasheet HTML 2Page - National Semiconductor (TI) LP2994MX Datasheet HTML 3Page - National Semiconductor (TI) LP2994MX Datasheet HTML 4Page - National Semiconductor (TI) LP2994MX Datasheet HTML 5Page - National Semiconductor (TI) LP2994MX Datasheet HTML 6Page - National Semiconductor (TI) LP2994MX Datasheet HTML 7Page - National Semiconductor (TI) LP2994MX Datasheet HTML 8Page - National Semiconductor (TI) LP2994MX Datasheet HTML 9Page - National Semiconductor (TI) Next Button
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Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
PVIN, AVIN, VTT, VDDQ, SD to GND
−0.3V to +6V
Storage Temp. Range
−65˚C to +150˚C
Junction Temperature
150˚C
Lead Temperature (Soldering, 10 sec)
260˚C
ESD Rating (Note 2)
2kV
Operating Range
Junction Temp. Range (Note 3)
0˚C to +125˚C
AVIN Supply Voltage
2.2V to 5.5V
PVIN Supply Voltage
-0.3V to (AVIN +
0.3V)
SD Input Voltage
-0.3V to (AVIN +
0.3V)
VTT Output Voltage
-0.3V to (PVIN +
0.3V)
SO-8 Thermal Resistance (
θ
JA)
151˚C/W
Electrical Characteristics Specifications with standard typeface are for T
J = 25˚C and limits in boldface
type apply over the full Operating Temperature Range (T
J = 0˚C to +125˚C). Unless otherwise specified,
AVIN = PVIN = 2.5V, VDDQ = 2.5V (Note 4).
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
TT
V
TT Output Voltage
I
OUT = 0A (Note 5)
VIN=VDDQ = 2.3V
1.108
1.138
1.168
V
VIN=VDDQ = 2.5V
1.210
1.236
1.260
VIN=VDDQ = 2.7V
1.305
1.334
1.360
I
q
Quiescent Current
I
OUT =0A
(Note 6)
272
400
µA
Z
VDDQ
VDDQ Input Impedance
86
100
k
Ω
I
QSD
Quiescent current in
shutdown
21
45
µA
I
SD
Shutdown Leakage
Current
SD=0V
SD = 2.5V
2
2
5
µA
nA
V
IH
Minimum Shutdown High
Level
1.9
V
V
IL
Maximum Shutdown Low
Level
0.8
V
∆V
TT/VTT
Load Regulation
(Note 7)
I
OUT = 0 to 1.5A
-0.4
%
I
OUT = 0 to −1.5A
+0.4
I
SENSE
SENSE Input Current
100
pA
Note 1: Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating range indicates conditions for which the device is
intended to be functional, but does not guarantee specific performance limits. For guaranteed specifications and test conditions see Electrical Characteristics. The
guaranteed specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed
test conditions.
Note 2: The human body model is a 100pF capacitor discharged through a 1.5k
Ω resistor into each pin.
Note 3: At elevated temperatures, devices must be derated based on thermal resistance. The device in the SO-8 package must be derated at
θJA = 151.2˚ C/W
junction to ambient with no heat sink.
Note 4: Limits are 100% production tested at 25˚C. Limits over the operating temperature range are guaranteed through correlation using Statistical Quality Control
(SQC) methods. The limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5: VIN is defined as the VIN = AVIN = PVIN
Note 6: Quiescent current defined as the current flow into AVIN.
Note 7: Load regulation is tested by using a 10ms current pulse and measuring VTT.
www.national.com
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