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LPS35HW 数据表(PDF) 4 Page - STMicroelectronics

部件名 LPS35HW
功能描述  Embedded temperature compensation
PDF  48 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

LPS35HW 数据表(HTML) 4 Page - STMicroelectronics

  LPS35HW Datasheet HTML 1Page - STMicroelectronics LPS35HW Datasheet HTML 2Page - STMicroelectronics LPS35HW Datasheet HTML 3Page - STMicroelectronics LPS35HW Datasheet HTML 4Page - STMicroelectronics LPS35HW Datasheet HTML 5Page - STMicroelectronics LPS35HW Datasheet HTML 6Page - STMicroelectronics LPS35HW Datasheet HTML 7Page - STMicroelectronics LPS35HW Datasheet HTML 8Page - STMicroelectronics LPS35HW Datasheet HTML 9Page - STMicroelectronics Next Button
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List of tables
LPS35HW
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DocID029129 Rev 1
List of tables
Table 1: Device summary table ..................................................................................................................1
Table 2: Pin description ..............................................................................................................................7
Table 3: Pressure and temperature sensor characteristics ........................................................................8
Table 4: Electrical characteristics ...............................................................................................................9
Table 5: SPI slave timing values.................................................................................................................9
Table 6: I2C slave timing values................................................................................................................10
Table 7: Absolute maximum ratings .........................................................................................................12
Table 8: Serial interface pin description....................................................................................................23
Table 9: I2C terminology ...........................................................................................................................23
Table 10: SAD+Read/Write patterns ........................................................................................................24
Table 11: Transfer when master is writing one byte to slave ...................................................................24
Table 12: Transfer when master is writing multiple bytes to slave ...........................................................24
Table 13: Transfer when master is receiving (reading) one byte of data from slave ...............................25
Table 14: Transfer when master is receiving (reading) multiple bytes of data from slave .......................25
Table 15: Registers address map.............................................................................................................29
Table 16: INTERRUPT_CFG (0Bh) register.............................................................................................31
Table 17: WHO_AM_I register..................................................................................................................32
Table 18: CTRL_REG1 (10h) register ......................................................................................................33
Table 19: Output data rate bit configurations ...........................................................................................33
Table 20: Low-pass filter configurations ...................................................................................................34
Table 21: CTRL_REG3 (12h) register ......................................................................................................35
Table 22: Interrupt configurations .............................................................................................................35
Table 23: CTRL_REG3 (12h) register ......................................................................................................36
Table 24: FIFO mode selection ................................................................................................................36
Table 25: REF_P_XL (15h) register .........................................................................................................37
Table 26: REF_P_L (16h) register ............................................................................................................37
Table 27: REF_P_H (17h) register ...........................................................................................................37
Table 28: RPDS_L (18h) register .............................................................................................................38
Table 29: RPDS_H (19h) register .............................................................................................................38
Table 30: RES_CONF (1Ah) register .......................................................................................................38
Table 31: INT_SOURCE (25h) register ....................................................................................................39
Table 32: FIFO_STATUS (26h) register ...................................................................................................39
Table 33: FIFO_STATUS example: OVR/FSS details .............................................................................39
Table 34: STATUS (27h) register .............................................................................................................40
Table 35: PRESS_OUT_XL (28h) register ...............................................................................................40
Table 36: PRESS_OUT_L (29h) register..................................................................................................42
Table 37: TEMP_OUT_L (2Bh) register ...................................................................................................42
Table 38: TEMP_OUT_H (2Ch) register...................................................................................................43
Table 39: CCLGA (3.5 x 3.5 x 1.85 mm) package mechanical data ........................................................44
Table 40: Reel dimensions for carrier tape of CCLGA10L package ........................................................46
Table 41: Document revision history ........................................................................................................47



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